CDB5351 Cirrus Logic Inc, CDB5351 Datasheet - Page 17

• Manufacturer Part Number: CDB5351
• Description: EVALUATION BOARD FOR CS5351
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5351

• Number Of Adc's: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Inputs Per Adc: 2 Single
• Power (typ) @ Conditions: 198mW @ 5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS5351
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1781

DS565F2
4.2.2
4.3
MCLK
Power-Up Sequence
Reliable power-up can be accomplished by keeping the device in reset until the power supplies, clocks and
configuration pins are stable. It is also recommended that reset be enabled if the analog or digital supplies
drop below the minimum specified operating voltages to prevent power glitch related issues.
The internal reference voltage must be stable for the device to produce valid data. Therefore, there is a de-
lay between the release of reset and the generation of valid output due to the finite output impedance of
FILT+ and the presence of the external capacitance.
Master Mode
In Master Mode, LRCK and SCLK operate as outputs. The left/right and serial clocks are internally derived
from the master clock with the left/right clock equal to Fs and the serial clock equal to 64x Fs, as shown
in
Figure
SAMPLE RATE (kHz)
23. Refer to
176.4
÷ 1
÷ 2
44.1
88.2
192
32
48
64
96
Table 3. CS5351 Common Master Clock Frequencies
Table 3
Figure 23. CS5351 Master Mode Clocking
MDIV
1
0
for common master clock frequencies.
MCLK (MHz)
MDIV = 0
11.2896
11.2896
11.2896
12.288
12.288
12.288
8.192
8.192
÷ 256
÷ 128
÷ 64
÷ 4
÷ 2
÷ 1
Double
Double
Single
Speed
Speed
Speed
Speed
Speed
Speed
Single
Quad
Quad
MCLK (MHz)
M1
MDIV = 1
22.5792
22.5792
22.5792
00
01
10
00
01
10
16.384
24.576
16.384
24.576
24.576
M0
LRCK Output
(Equal to Fs)
SCLK Output
CS5351
17