KDC2708LEVAL Intersil, KDC2708LEVAL Datasheet - Page 2

DAUGHTER CARD FOR KAD2708

KDC2708LEVAL

Manufacturer Part Number
KDC2708LEVAL
Description
DAUGHTER CARD FOR KAD2708
Manufacturer
Intersil
Series
FemtoCharge™r

Specifications of KDC2708LEVAL

Number Of Adc's
1
Number Of Bits
8
Sampling Rate (per Second)
275M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
1.5 Vpp
Power (typ) @ Conditions
275mW @ 275MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
KAD2708L-27, KMB001 Motherboard
For Use With
KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table of Contents
Absolute Maximum Ratings ........................................ 3
Thermal Information ..................................................... 3
Electrical Specifications ............................................... 3
Digital Specifications .................................................... 5
Timing Diagram ............................................................. 6
Timing Specifications .................................................. 6
ESD ................................................................................ 6
Pin Description ............................................................. 7
Pin Configuration ......................................................... 8
Typical Performance Curves .........................................9
Functional Description .................................................12
Equivalent Circuits .......................................................14
Layout Considerations ................................................15
Definitions......................................................................15
Package Outline Drawing ............................................16
Reset .........................................................................12
Voltage Reference .....................................................12
Analog Input ..............................................................12
Clock Input ................................................................13
Jitter ...........................................................................13
Digital Outputs ...........................................................14
Split Ground and Power Planes ................................15
Clock Input Considerations.........................................15
Bypass and Filtering ..................................................15
LVDS Outputs ...........................................................15
Unused Inputs ...........................................................15
L68.10x10B ................................................................16
2
KAD2708L
April 14, 2011
FN6813.1

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