EVAL-AD7694CBZ Analog Devices Inc, EVAL-AD7694CBZ Datasheet - Page 15

• Manufacturer Part Number: EVAL-AD7694CBZ
• Description: BOARD EVALUATION FOR AD7694
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7694CBZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 250k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 6.3mW @ 250kSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7694
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DIGITAL INTERFACE
The AD7694 is compatible with SPI, QSPI, digital hosts, and
DSPs, for example, Blackfin® ADSP-BF53x or ADSP-219x. The
connection diagram is shown in Figure 25 and the
corresponding timing diagram is shown in Figure 24.
A rising edge on CNV initiates a conversion and forces SDO to
high impedance. When the conversion is complete, the AD7694
enters the acquisition phase and powers down. When CNV
goes low, the MSB is output onto SDO. The remaining data bits
are clocked by SCK falling edges. The data is valid on both SCK
edges.
LAYOUT
The printed circuit board that houses the AD7694 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. The pinout of the
AD7694 with all its analog signals on the left side and all its
digital signals on the right side eases this task.
SDO
CNV
SCK
ACQUISITION
AD7694
1
CNV
SCK
SDO REMAINS LOW IF FURTHER SCK CLOCKS ARE APPLIED WHILE CNV IS LOW.
Figure 25. Connection Diagram
SDO
CONVERSION
t
CONV
CONVERT
DATA IN
CLK
DIGITAL HOST
t
EN
Figure 24. Serial Interface Timing
D15
1
t
Rev. A | Page 15 of 16
HSDO
D14
2
t
CYC
ACQUISITION
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7694 is used as a shield. Fast switching signals, such as CNV
or clocks, should never run near analog signal paths. Crossover
of digital and analog signals should be avoided.
At least one ground plane should be used. It could be common
or split between the digital and analog section. In such a case, it
should be joined underneath the AD7694s.
The AD7694 voltage reference input REF has a dynamic input
impedance and should be decoupled with minimal parasitic
inductances. That is done by placing the reference decoupling
ceramic capacitor close to, and ideally right up against, the REF
and GND pins and by connecting these pins with wide, low
impedance traces.
Finally, the power supply, VDD, of the AD7694 should be
decoupled with a ceramic capacitor, typically 100 nF. This
capacitor should be placed close to the AD7694 and connected
using short and large traces to provide low impedance paths
and reduce the effect of glitches on the power supply lines.
EVALUATING THE AD7694’S PERFORMANCE
Other recommended layouts for the AD7694 are outlined in the
evaluation board for the AD7694 (EVAL-AD7694). The
evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from a PC via the
D13
t
3
ACQ
t
DSDO
t
SCKL
t
SCKH
14
t
SCK
15
D1
EVAL-CONTROL
16
D0
1
t
DIS
BRD3.
AD7694