CDB53L21 Cirrus Logic Inc, CDB53L21 Datasheet - Page 48

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CDB53L21

Manufacturer Part Number
CDB53L21
Description
BOARD EVAL FOR CS53L21 ADC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB53L21

Number Of Adc's
2
Number Of Bits
24
Sampling Rate (per Second)
96k
Data Interface
Serial
Inputs Per Adc
3 Single Ended
Input Range
±2.5 V
Power (typ) @ Conditions
22.45mW @ 48kSPS, 2.5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS53L21
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1550
CS53L21
6.8
SPE Control (Address 09h)
7
6
5
4
3
2
1
0
Reserved
SPE_ENABLE
FREEZE
Reserved
Reserved
Reserved
SPE_SZC1
SPE_SZC0
SPE_ENABLE
Default: 0
0 - Reserved
1 - ADC Serial Port to SPE
Function:
Selects the digital signal source for the SPE. Note: If DIGMIX = 1, SPE_ENABLE must be 1 for the SPE to
be functional.
Freeze Controls (FREEZE)
Default: 0
Function:
This function will freeze the previous settings of, and allow modifications to be made to all control port reg-
isters without the changes taking effect until the FREEZE is disabled. To have multiple changes in the con-
trol port registers take effect simultaneously, enable the FREEZE bit, make all register changes, then
disable the FREEZE bit.
48
DS700PP1

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