CDB53L21 Cirrus Logic Inc, CDB53L21 Datasheet - Page 50

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CDB53L21

Manufacturer Part Number
CDB53L21
Description
BOARD EVAL FOR CS53L21 ADC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB53L21

Number Of Adc's
2
Number Of Bits
24
Sampling Rate (per Second)
96k
Data Interface
Serial
Inputs Per Adc
3 Single Ended
Input Range
±2.5 V
Power (typ) @ Conditions
22.45mW @ 48kSPS, 2.5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS53L21
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1550
50
6.10
ADCx_ATT7
7
ALCX Zero Cross Disable (ALCX_ZCDIS)
Default: 0
0 - Off
1 - On
Function:
Overrides the ZCROSSx bit setting for the ADC. When this bit is set, the ALC attack rate in the PGA will not
be dictated by the zero cross setting. ALC volume-level changes will take effect immediately in one step.
PGA X Gain Control (PGAX_VOL[4:0])
Default: 00000
Function:
The PGAx Gain Control register allows independent setting of the signal levels in 0.5 dB increments as dic-
tated by the ADCx Soft and Zero Cross bits (SOFTx & ZCROSSx) from +12 dB to -3 dB. Gain settings are
decoded as shown in the table above. The gain changes are implemented as dictated by the ALCX Soft &
Zero Cross bits (ALCX_SRDIS & ALCX_ZCDIS).
Note:
ADCx Attenuator: ADCA (Address 0Ch) & ADCB (Address 0Dh)
ADCX Attenuation Control (ADCX_ATT[7:0])
Default: 00h
Binary Code
Binary Code
0000 0000
1010 0000
1000 0000
0111 1111
1111 1110
1111 1111
ADCx_ATT6
11000
01010
00000
11001
11010
When the ALC is enabled, the PGA is automatically controlled and should not be adjusted manu-
ally.
11110
11111
···
···
···
···
···
···
6
ADCx_ATT5
Volume Setting
Volume Setting
5
+12 dB
-0.5 dB
-96 dB
-96 dB
+5 dB
-1 dB
-3 dB
-3 dB
-1 dB
-2 dB
0 dB
0 dB
0 dB
···
···
···
···
···
···
ADCx_ATT4
4
ADCx_ATT3
3
ADCx_ATT2
2
ADCx_ATT1
1
CS53L21
ADCx_ATT0
DS700PP1
0

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