ADC122S706EB/NOPB National Semiconductor, ADC122S706EB/NOPB Datasheet - Page 10

• Manufacturer Part Number: ADC122S706EB/NOPB
• Description: BOARD EVAL FOR ADC122S706
• Manufacturer: National Semiconductor

Specifications of ADC122S706EB/NOPB

• Number Of Adc's: 2
• Number Of Bits: 12
• Sampling Rate (per Second): 1M
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 25mW @ 1MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: ADC122S706
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC122S706EB

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Specification Definitions
APERTURE DELAY is the time between the fourth falling
edge of SCLK and the time when the input signal is acquired
or held for conversion.
COMMON MODE REJECTION RATIO (CMRR) is a measure
of how well in-phase signals common to both input pins are
rejected.
To calculate CMRR, the change in output offset is measured
while the common mode input voltage is changed from 2V to
3V.
CONVERSION TIME is the time required, after the input volt-
age is acquired, for the ADC to convert the input voltage to a
digital word.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital
waveform is high to the total time of one period. The specifi-
cation here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS) is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD − 1.76) /
6.02 and says that the converter is equivalent to a perfect
ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
INTEGRAL NON-LINEARITY (INL) is a measure of the de-
viation of each individual code from a line drawn from negative
full scale (½ LSB below the first code transition) through pos-
itive full scale (½ LSB above the last code transition). The
deviation of any given code from this straight line is measured
from the center of that code value.
MISSING CODES are those output codes that will never ap-
pear at the ADC outputs. The ADC122S706 is guaranteed not
to have any missing codes.
NEGATIVE FULL-SCALE ERROR is the difference between
the differential input voltage at which the output code transi-
tions from negative full scale to the next code and −V
LSB.
NEGATIVE GAIN ERROR is the difference between the neg-
ative full-scale error and the offset error.
OFFSET ERROR is the difference between the differential
input voltage at which the output code transitions from code
000h to 001h and 1/2 LSB.
CMRR = 20 LOG ( Δ Common Input / Δ Output Offset)
REF
+ 0.5
10
POSITIVE FULL-SCALE ERROR is the difference between
the differential input voltage at which the output code transi-
tions to positive full scale and V
POSITIVE GAIN ERROR is the difference between the pos-
itive full-scale error and the offset error.
POWER SUPPLY REJECTION RATIO (PSRR) is a measure
of how well a change in supply voltage is rejected. PSRR is
calculated from the ratio of the change in offset error for a
given change in supply voltage, expressed in dB. For the AD-
C122S706, V
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the sam-
pling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or
SINAD) Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral com-
ponents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the desired signal amplitude
to the amplitude of the peak spurious spectral component,
where a spurious spectral component is any signal present in
the output spectrum that is not present at the input and may
or may not be a harmonic.
TOTAL HARMONIC DISTORTION (THD) is the ratio of the
rms total of the first five harmonic components at the output
to the rms level of the input signal frequency as seen at the
output, expressed in dB. THD is calculated as
where A
put and A
harmonic frequencies.
THROUGHPUT TIME is the minimum time required between
the start of two successive conversion.
f1
is the RMS power of the input frequency at the out-
f2
through A
A
PSRR = 20 LOG (ΔOffset / ΔV
is changed from 4.5V to 5.5V.
f6
are the RMS power in the first 5
REF
minus 1.5 LSB.
A
)