ADC101C02XEB/NOPB National Semiconductor, ADC101C02XEB/NOPB Datasheet - Page 19

BOARD EVALUATION FOR ADC101C02X

ADC101C02XEB/NOPB

Manufacturer Part Number
ADC101C02XEB/NOPB
Description
BOARD EVALUATION FOR ADC101C02X
Manufacturer
National Semiconductor

Specifications of ADC101C02XEB/NOPB

Number Of Adc's
1
Number Of Bits
10
Sampling Rate (per Second)
188.9k
Data Interface
I²C
Inputs Per Adc
1 Single Ended
Power (typ) @ Conditions
780mW @ 22kSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Utilized Ic / Part
ADC101C021, ADC101C027
Silicon Manufacturer
National
Silicon Core Number
ADC101C021, ADC101C027
Kit Application Type
Data Converter
Application Sub Type
ADC
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC101C02XEB
1.6.6 V
This register holds the upper limit threshold used to determine the alert condition. If the conversion moves higher than this limit, a
V
Pointer Address 04h (Read/Write)
Default Value: 0FFFh
1.6.7 V
This register holds the hysteresis value used to determine the alert condition. After a V
result must move within the V
in the configuration register, alert conditions will not self-clear.
Pointer Address 05h (Read/Write)
Default Value: 0000h
1.6.8 V
This register holds the Lowest Conversion result when in the automatic conversion mode. Each conversion result is compared
against the contents of this register. If the value is lower, it becomes the lowest conversion and replaces the current value. If the
value is higher, the register contents remain unchanged. The lowest conversion value can be cleared at any time by writing 0FFFh
to this register. The value of this register will update automatically when the automatic conversion mode is enabled, but is NOT
updated in the normal mode.
Pointer Address 06h (Read/Write)
Default Value: 0FFFh
Bits
15:12
11:2
1:0
Bits
15:12
11:2
1:0
HIGH
D15
D15
D15
alert is generated.
D7
D7
HIGH
HYST
MIN
Name
Reserved
V
Reserved
Name
Reserved
Hysteresis
Reserved
-- Lowest Conversion Register
HIGH
-- Alert Limit Register - Over Range
-- Alert Hysteresis Register
Limit
D14
D14
D14
D6
D6
Reserved
Reserved
Reserved
HIGH
Description
Always reads zeros. Zeros must be written to these bits.
Sets the upper limit threshold used to determine the alert condition. If the conversion moves
higher than this limit, a V
Always reads zeros. Zeros must be written to these bits.
Description
Always reads zeros. Zeros must be written to these bits.
Sets the hysteresis value used to determine the alert condition. D11 is MSB. After a V
V
this value to clear the alert condition.
Note: If the Alert Hold bit is set in the configuration register, alert conditions will not self-clear.
Always reads zeros. Zeros must be written to these bits.
or V
LOW
D13
D13
D13
LOW
D5
D5
alert occurs, the conversion result must move within the V
V
Hysteresis [5:0]
HIGH
limit by more than this value to clear the alert condition. Note: If the Alert Hold bit is set
Limit [5:0]
D12
D12
D12
D4
D4
HIGH
alert is generated.
19
D11
D11
D11
D3
D3
Lowest Conversion [9:6]
D10
D10
D10
D2
D2
HIGH
V
Hysteresis [9:6]
HIGH
or V
Limit [9:6]
LOW
HIGH
alert occurs, the conversion
or V
D9
D1
D9
D1
D9
LOW
Reserved
Reserved
limit by more than
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HIGH
D8
D0
D8
D0
D8
or

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