ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 9

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ADC08D1020DEV/NOPB

Manufacturer Part Number
ADC08D1020DEV/NOPB
Description
BOARD DEV FOR ADC08D1020
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of ADC08D1020DEV/NOPB

Number Of Adc's
2
Number Of Bits
8
Sampling Rate (per Second)
1G
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
870 mVpp
Power (typ) @ Conditions
1.6W @ 1GSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC08D1020
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC08D1020DEV
STATIC CONVERTER CHARACTERISTICS
INL
DNL
V
V
PFSE
NFSE
FS_ADJ
NORMAL MODE (Non DES) DYNAMIC CONVERTER CHARACTERISTICS, 1:2 DEMUX MODE
FPBW
C.E.R.
ENOB
SINAD
OFF
OFF
Symbol
Absolute Maximum Ratings
(Note
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Converter Electrical Characteristics
The following specifications apply after calibration for V
mV
Non-Extended Control Mode; SDR Mode; R
Demultiplex; Duty Cycle Stabilizer on. Boldface limits apply for T
noted.
Supply Voltage (V
Supply Difference
Voltage on Any Input Pin
(Except V
Voltage on V
(Maintaining Common Mode)
Ground Difference
Input Current at Any Pin
3)
Package Input Current
Power Dissipation at T
ESD Susceptibility
Storage Temperature
_ADJ
P-P
1,
V
|GND - DR GND|
Human Body Model
Machine Model
Charged Device Model
; C
(Note
DR
Note
L
= 10 pF; Differential, a.c. coupled Sine Wave Input Clock, f
- V
IN
Integral Non-Linearity
(Best fit)
Differential Non-Linearity
Resolution with No Missing
Codes
Offset Error
Input Offset Adjustment Range Extended Control Mode
Positive Full-Scale Error
Negative Full-Scale Error
Full-Scale Adjustment Range Extended Control Mode
Full Power Bandwidth
Code Error Rate
Gain Flatness
Effective Number of Bits
Signal-to-Noise Plus Distortion
Ratio
+, V
6,
A
2)
IN
Note
+, V
IN
- )
A
IN
(Note
, V
7)
Parameter
-
DR
A
(Note
)
(Note
4)
85°C
3)
−0.15V to (V
−65°C to +150°C
EXT
DC Coupled, 1 MHz Sine Wave Overanged
DC Coupled, 1 MHz Sine Wave Overanged
(Note
(Note
Normal Mode
d.c. to 498 MHz
d.c. to 1 GHz
f
f
f
f
IN
IN
IN
IN
0V to 100 mV
0V to 100 mV
-0.15 to 2.5V
= 248 MHz, V
= 498 MHz, V
= 248 MHz, V
= 498 MHz, V
= 3300 Ω ±0.1%; Analog Signal Source Impedance = 100 Ω Differential; 1:2 Output
A
9)
9)
+0.15V)
±25 mA
±50 mA
2500V
1000V
2.3 W
250V
2.2V
A
= V
Conditions
IN
IN
IN
IN
DR
= FSR − 0.5 dB
= FSR − 0.5 dB
= FSR − 0.5 dB
= FSR − 0.5 dB
= 1.9V; OutV = 1.9V; V
9
A
Operating Ratings
Soldering
Semiconductor’s Reflow Temperature Profile specifications.
Refer to www.national.com/packaging.
= T
Ambient Temperature Range
Supply Voltage (V
Driver Supply Voltage (V
Common Mode Input Voltage
V
(Maintaining Common Mode)
Ground Difference
CLK Pins Voltage Range
Differential CLK Amplitude
CLK
IN
MIN
+, V
= 1 GHz at 0.5 V
Exposed Pad
(|GND − DR GND|)
128-Lead,
Package
to T
IN
LQFP
− Voltage Range
MAX
process
Package Thermal Resistance
. All other limits T
IN
A
(Note
Typical
)
FSR (a.c. coupled) = differential 870
±0.15
−0.45
P-P
10
±0.3
±0.8
±1.0
46.5
46.5
±45
±20
2.0
7.4
7.4
26°C / W
−18
with 50% duty cycle; V
must
θ
DR
8)
JA
)
A
(Note
(Note
comply
Limits
= 25°C, unless otherwise
Package
10°C / W
±0.9
±0.6
43.9
43.9
±25
±25
±15
Top of
7.0
7.0
8
θ
−40°C
JC
1,
(Note
8)
Note
(100% duty cycle)
0.4V
(10% duty cycle)
with
+1.8V to +2.0V
V
5)
P-P
CMO
BG
2)
2.8°C / W
Thermal
0V to 2.15V
T
+1.8V to V
Error/Sample
www.national.com
0V to 2.5V
A
LSB (max)
LSB (max)
LSB (max)
to 2.0V
LSB (min)
mV (max)
mV (max)
= Floating;
Bits (min)
Bits (min)
Pad
dB (min)
dB (min)
θ
(Limits)
± 50 mV
0V to V
JC
Units
dBFS
dBFS
National
%FS
GHz
Bits
mV
+85°C
0V
P-P
A
A

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