LM4930LQBD National Semiconductor, LM4930LQBD Datasheet - Page 6

• Manufacturer Part Number: LM4930LQBD
• Description: BOARD EVALUATION LM4930LQ
• Manufacturer: National Semiconductor
• Series: Boomer®r

Specifications of LM4930LQBD

• Amplifier Type: Class AB
• Output Type: 1-Channel (Mono) with Stereo Headphones
• Max Output Power X Channels @ Load: 1W x 1 @ 8 Ohm; 27mW x 2 @ 32 Ohm
• Voltage - Supply: 2.6 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Board Type: Fully Populated
• Utilized Ic / Part: LM4930
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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System Control Registers
BIT
RESET
Address
0
4:1
5
6
7
8:9
10:11
12
13
14
15
This register configures the voiceband codec, sidetone attenuation, and selected control functions. The 7 bit address for the
VOICE TESTCONFIG register is XX10001.
VOICETESTCONFIG (XX10001). (Set = logic 1, Clear = logic 0)
15
0
Register
CLASS
SIDESTONE_ATTEN Programs the attenuation of the digital sidetone. Attenuation is set as follows:
AUTOSIDE
CLOCK_DIV
ZXD_DISABLE
RSVD
CAP_SIZE
ZXDS_SLOW
MUTE_LS
MUTE_HP
MUTE_MIC
14
0
13
0
Description
If set, configures the chip for use with an external class D or linear amplifier and turns the
BTL speaker output into a buffer. (Note 12)
4:1
0000
0001
0010
0011
0100
0101
0110
0111
This feature is included for use with the mono speaker in hands-free applications where
sidetones may not be desirable. If set, the sidetone is always muted in modes when voice is
played on the mono speaker (0010, 0100, 1001, and 1010), otherwise the sidetone is present
at whatever level is set in the attenuation conrol register
If set, allows for the use of a 24.576MHz crystal. Default setting is for 12.288MHz crystal.
(Note 12)
Disables the zero crossing detect in the stereo DAC to guarantee immediate mode changes
rather than waiting for a zero cross. (Note 11)
RESERVED (Note 13)
Set to accomodate different bypass capacitor values to give correct turn-off delay and
click/pop performance. Value is set as follows: (Note 12)
10:11
00
01
10
11
If set, this forces the stereo DAC outputs to wait for a zero crossing before powering down
If set, mutes the loudspeaker amplifier in any mode where it is not already muted
If set, mutes the headphone amplifier in any mode where it is not already muted
If set, mutes the microphone preamp
12
0
VOICE/TEST CONFIG REGISTERS
(Continued)
(X = 0 if ADDR is set to logic 0)
11
0
Sidetone
Attenuation
Mute
-30dB
-27dB
-24dB
-21dB
-18dB
-15dB
-12dB
Delay
25ms
50ms
85ms
RESERVED
10
0
6
9
0
8
0
4:1
1000
1001
1010
1011
1100
1101
1110
1111
Bypass Capacitor Size
0.1µF
0.39µF
1µF
RESERVED
7
0
(X = 1 if ADDR is set to logic 1)
6
0
5
0
Sidetone Attenuation
-9dB
-6dB
-3dB
0dB
Mute
Mute
Mute
Mute
4
0
3
0
2
0
1
0
0
0