DM300023 Microchip Technology, DM300023 Datasheet - Page 8

• Manufacturer Part Number: DM300023
• Description: KIT DEMO DSPICDEM SMPS BUCK
• Manufacturer: Microchip Technology
• Series: dsPIC™r

Specifications of DM300023

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 2, Non-Isolated
• Voltage - Input: 7 ~ 15V
• Regulator Topology: Buck
• Board Type: Fully Populated
• Utilized Ic / Part: dsPIC30F2020
• Processor To Be Evaluated: dsPIC30F202x/1010
• Interface Type: RS-232
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -
• Frequency - Switching: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
15. Module: Output Compare Module in PWM
16. Module: Output Compare Module
DS80319D-page 8
The output compare module will miss a compare
event when the current duty cycle register
(OCxRS) value is 0x0000 (0% duty cycle) and the
OCxRS register is updated with a value of 0x0001.
The compare event is missed only the first time a
value of 0x0001 is written to OCxRS, and the
PWM output remains low for one PWM period.
Subsequent PWM high and low times occur as
expected.
Work around
None. If the current OCxRS register value is
0x0000, avoid writing a value of 0x0001 to
OCxRS. Instead, write a value of 0x0002;
however, in this case the duty cycle will be slightly
different from the desired value.
When the Output Compare Module is operated in
the Dual Compare Match mode, a timer compare
match with the value in the OCxR register sets the
OCx output producing a rising edge on the OCx
pin. Then, when a timer compare match with the
value in the OCxRS register occurs, the OCx
output is reset producing a falling edge on the OCx
pin.
The above statement applies to all conditions
except when the difference between OCxR and
OCxRS is ‘1’. In this case, the Output Compare
module may miss the reset compare event, and
cause the OCx pin to remain continuously high.
This condition will remain until the difference
between values in the OCxR and OCxRS registers
is made greater than ‘1’.
Work around
Ensure in software that the difference between
values in OCxR and OCxRS registers is
maintained greater than ‘1’.
Mode
17. Module: SPI Module in Slave Select Mode
18. Module: SPI Module in Frame Master
Note:
Note:
The SPI module Slave Select functionality
(enabled by setting SSEN = 1) will not function
correctly. Whether the SSx pin (x = 1 or 2) is high
or low, the SPI data transfer will be completed and
an interrupt will be generated. This applies to the
dsPIC30F2023 device only.
Work around
Manually poll the SSx pin state in the SPI interrupt
by reading the associated PORT bit:
• If the PORT bit is ‘0’, then perform the required
• If the PORT bit is ‘1’, then clear the SPI
The SPI module will fail to generate frame
synchronization pulses when configured in the
Frame Master mode if the start of data is selected
to
synchronization pulse (FRMEN = 1, SPIFSD = 0).
However, the module functions correctly in Frame
Slave mode, and also in Frame Master mode if
FRMDLY = 0. This applies to the dsPIC30F2023
device only.
Work around
Manually drive the SSx pin (x = 1 or 2) high using
the associated PORT register, and then drive it low
after the required 1 bit-time pulse-width. This
operation needs to be performed when the
transmit buffer is written.
If FRMDLY = 0, no work around is needed.
data read/write.
interrupt flag (SPIxIF), perform a dummy read
of the SPIxBUF register, and return from the
Interrupt Service Routine.
coincide
The dsPIC30F1010/202X devices have
only one SPI. All references to x = 2 are
intended for software compatibility with
other dsPIC DSC devices.
The dsPIC30F1010/202X devices have
only one SPI. All references to x = 2 are
intended for software compatibility with
other dsPIC DSC devices.
Mode
with
© 2008 Microchip Technology Inc.
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