LM25575EVAL National Semiconductor, LM25575EVAL Datasheet - Page 12
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LM25575EVAL
Manufacturer Part Number
LM25575EVAL
Description
BOARD EVALUATION FOR LM25575
Manufacturer
National Semiconductor
Series
PowerWise®, SIMPLE SWITCHER®r
Datasheets
1.LM25575MHXNOPB.pdf
(24 pages)
2.LM25575BLDTNOPB.pdf
(4 pages)
3.LM25575EVAL.pdf
(6 pages)
Specifications of LM25575EVAL
Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
5V
Current - Output
1.5A
Voltage - Input
7 ~ 42V
Regulator Topology
Buck
Frequency - Switching
300kHz
Board Type
Fully Populated
Utilized Ic / Part
LM25575
Lead Free Status / RoHS Status
Not applicable / Not applicable
Power - Output
-
Other names
*LM25575EVAL
www.national.com
The sample & hold DC level illustrated in Figure 6 is derived
from a measurement of the re-circulating Schottky diode an-
ode current. The re-circulating diode anode should be con-
nected to the IS pin. The diode current flows through an
internal current sense resistor between the IS and PGND
pins. The voltage level across the sense resistor is sampled
and held just prior to the onset of the next conduction interval
of the buck switch. The diode current sensing and sample &
hold provide the DC level of the reconstructed current signal.
The positive slope inductor current ramp is emulated by an
external capacitor connected from the RAMP pin to AGND
and an internal voltage controlled current source. The ramp
current source that emulates the inductor current is a function
of the Vin and Vout voltages per the following equation:
Proper selection of the RAMP capacitor depends upon the
selected value of the output inductor. The value of C
be selected from: C
the output inductor in Henrys. With this value, the scale factor
of the emulated current ramp will be approximately equal to
the scale factor of the DC level sample and hold (1.0 V / A).
The C
vice and connected directly to the pins of the IC (RAMP and
AGND).
For duty cycles greater than 50%, peak current mode control
circuits are subject to sub-harmonic oscillation. Sub-harmonic
RAMP
capacitor should be located very close to the de-
I
RAMP
= (10µ x (Vin – Vout)) + 50µA
RAMP
= L x 10
-5
, where L is the value of
FIGURE 6. Composition of Current Sense Signal
RAMP
can
12
oscillation is normally characterized by observing alternating
wide and narrow pulses at the switch node. Adding a fixed
slope voltage ramp (slope compensation) to the current sense
signal prevents this oscillation. The 50µA of offset current
provided from the emulated current source adds some fixed
slope to the ramp signal. In some high output voltage, high
duty cycle applications, additional slope may be required. In
these applications, a pull-up resistor may be added between
the V
sation.
For V
Calculate optimal slope current, I
For example, at V
Install a resistor from the RAMP pin to V
R
RAMP
CC
OUT
= V
and RAMP pins to increase the ramp slope compen-
FIGURE 7. R
> 7.5V:
CC
/ (I
OS
OUT
- 50µA)
= 10V, I
RAMP
to V
OS
CC
= 100µA.
OS
20212145
for V
= V
OUT
CC
OUT
:
x 10µA/V.
> 7.5V
20212108