SI3461-KIT Silicon Laboratories Inc, SI3461-KIT Datasheet
SI3461-KIT
Specifications of SI3461-KIT
Related parts for SI3461-KIT
SI3461-KIT Summary of contents
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... The Si3461 is designed to operate completely independently of host processor control. An LED status signal is provided to indicate the port status, including detection, power good, and output fault event information. The Si3461 is pin- programmable to support four available power levels, endpoint and mid-span applications, and auto-retry or restart after disconnect functions ...
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... Si3461 2 Rev. 1.0 ...
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... T C ABLE O F ONTENTS Section 1. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Si3461 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2.1. Si3461-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 2.2. PSE Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. Typical Si3461-EVB Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. Si3461-EVB Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1. Reset State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 4.2. Operating Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. Operating Mode Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1. Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 ...
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... Si3461 1. Typical Application Schematic +50V V IN +50V Optional 3.3V regulator V DD +3.3V GND GND Note: Refer to the Si3461-EVB User Guide for complete schematic details Figure 1. Si3461 Typical Application Schematic 4 VDD CLSMARK DC1 DC2 Si3461 CLSMODE DETA RST VSENSE ISENSE STATUS DETECT ...
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... Si3461 Electrical Specifications The following specifications apply to the Si3461 controller. Refer to Tables 4 and 5 and the Si3461-EVB User's Guide and schematics for additional details about the electrical specifications of the Si3461-EVB reference design. Table 1. Recommended Operating Conditions Symbol Description Operating Temperature Range Thermal Impedance VDD Input Supply Voltage Table 2 ...
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... Si3461 Table 3. Electrical Characteristics* Symbol Description Digital Pins: CLSMARK, DC1, DC2, CLSMODE, STATUS (Output mode), RST V Output High Voltage OH V Output Low Voltage OL V Input High Voltage IH V Input Low Voltage IL I Input Leakage Current IL Analog Pins: ISENSE, VSENSE, DETA, STATUS (Input mode) ...
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... Si3461-EVB Performance Characteristics When implemented according to the recommended external component and layout guidelines for the Si3461-EVB, the Si3461 enables the following performance specifications in single-port PSE applications. Refer to the Si3461- EVB User's Guide and schematics for details. Table 4. Selected Electrical Specifications (Si3461-EVB) ...
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... Si3461 Table 4. Selected Electrical Specifications (Si3461-EVB) (Continued) Symbol Description Classification I _ CLASS REGION Current Region Mark Voltage V MARK Mark Current I MARK_LIM Protection and Current Control Overload Current I CUT 2,3 Threshold Overload Current I LIM 4 Limit I PoE+ LIM Overload Time T LIM Disconnect Current ...
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... PSE Timing Characteristics When implemented in accordance with the recommended external components and layout guidelines, the Si3461 controller enables the following typical performance characteristics in single-port PSE applications. Refer to the Si3461-EVB applications note, schematics, and user's guide for more details. Description Symbol ...
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... Detection t CLASS_CYCLE Classification t PWRUP PoE+ Current Limit Response t LIM PoE+ Figure 2. Typical Si3461-EVB Waveforms 10 Powering a PoE Device Ch1: PoE output voltage referenced to the +50V rail Detection Classification Power-on Classification and Power-up Delay PoE Ch1: PoE output voltage referenced to the +50V rail ...
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... In combination with low-cost external components, the Si3461 controller provides a complete PSE solution for embedded PoE applications. The Si3461-EVB reference design operates from a +50 V isolated power supply and delivers power to the powered device through a FET switch without controlling the output voltage while in the power-on state ...
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... At power- reset is held low, the Si3461 inactive state with the pass FET Q4 off. 4.2. Operating Mode Configuration At power-up, the Si3461 reads the voltage on the STATUS pin, which is set by a DIP switch and a resistor network. The STATUS pin voltage level configures all of the Si3461's operating modes as summarized in Table 6. ...
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... If the Si3461-EVB has available power, it attempts to classify a Type2 PD first by the two-event method. If the detected class is other than Class 4 or there is less than power available, the Si3461 tries to classify a Type1 PD using the one-event method. If the class level of the PD is not within the supported range as set by the initial voltage on the Si3461's STATUS pin (refer to the Operating Mode Configuration section above), an error is declared, and the LED blinks rapidly rate ...
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... Ethernet cable from the Si3461-EVB's RJ-45 jack labeled “PoE”. Then, the detection process begins; the status LED blinks at a rate of 1.5 Hz, and the Si3461 is allowed to go into classification and power-up mode if a valid PD signature resistance is detected. ...
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... IEEE 802.3 compliance. 6.3. Input DC Supply The Si3461-EVB reference design requires an isolated 50 V nominal dc input voltage (with a minimum and a maximum of 57 V). The input power supply should be rated for at least 10% higher power level than the output power level chosen. ...
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... Si3461 7. Si3461 Pin Descriptions Si3461 pin functionality is described in Table 7. Note that the information applies to the Si3461 device pins, while the Si3461-EVB User's Guide describes the inputs and outputs of the evaluation system. Refer to the complete Si3461-EVB schematics and BOM listing for information about the external components needed for the complete PSE application circuit ...
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... Table 7. Si3461 Pin Functionality (Continued) Pin # Pin Name Pin Type 10 STATUS Analog in/Digital out 11 GND GND Pin Function At power-up, the voltage on this pin is sensed to configure the PSE available power, mid span/end span timing mode and the device's restart behavior when a fault condition is detected. Refer to " ...
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... Ordering Guide Ordering Part Number Si3461-E02-GM Single-port PSE controller Si3461-KIT Si3461 evaluation board and reference Notes: 1. Add R to part number to denote tape-and-reel option (e.g., Si3461-E02-GMR). 2. The ordering part number above is not the same as the device mark. See "9.3. Marking Specification" on page 22 for more information ...
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... Package Outline: 11-Pin QFN Figure 4 illustrates the package details for the Si3461. Table 8 lists the values for the dimensions shown in the illustration. The Si3461 is packaged in an industry-standard, 3x3 mm, RoHS-compliant, 11-pin QFN package. Table 8. Package Diagram Dimensions Dimension aaa bbb ddd eee Notes: 1 ...
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... Si3461 9.1. Solder Paste Mask 0.10 mm 0.35 mm 0.50 mm 0. 0.50 mm 0.35 mm 0. 0.60 mm 0. Figure 5. Solder Paste Mask Rev. 1.0 0.70 mm ...
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... PCB Landing Pattern 0.10 mm 0.35 mm 0.50 mm 0. Figure 6. Typical QFN-11 Landing Diagram 0. Rev. 1.0 Si3461 21 ...
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... Si3461 9.3. Marking Specification The top of the Si3461 package is marked as shown in Figure 7. Line 1 Marking: Pin 1 Identifier Product ID Line 2 Marking: ETTT = Trace Code Line 3 Marking: YWW = Date Code Lead-Free Designator 22 6102 ETTT YWW+ Figure 7. QFN 11 Top Marking Table 9. Top Marking Explanation Circle = 0.25 mm Diameter 6102 61 = Si3461 ...
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... Added min OVLO and max UVLO limits. Updated not to include the shunt regulator IN current. Updated I values to be consistent with IEEE CUT specification. Updated Table 6 on page 12. Update suggested parallel resistance at status pin in Note 2. and V values. IL Rev. 1.0 Si3461 23 ...
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... Si3461 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...