ISL6228LOEVAL3Z Intersil, ISL6228LOEVAL3Z Datasheet - Page 12

• Manufacturer Part Number: ISL6228LOEVAL3Z
• Description: EVALUATION BOARD FOR ISL6228LO
• Manufacturer: Intersil
• Series: Robust Ripple Regulator™ (R³)r

Specifications of ISL6228LOEVAL3Z

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 2, Non-Isolated
• Voltage - Output: 1.5V or 1.8V, 1.8V
• Current - Output: 8A, 8A
• Voltage - Input: 3.3 ~ 25V
• Regulator Topology: Buck
• Frequency - Switching: 270kHz, 300kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6228
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

dissipates heat as a function of RMS current and frequency.
Be sure that I
capacitors so that they operate below the maximum rated
RMS current at f
a capacitor can fade as much as 50% as the DC voltage
across it increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and capable of
supplying the RMS current required by the switching circuit.
Their voltage rating should be at least 1.25 times greater
than the maximum input voltage, while a voltage rating of 1.5
times is a preferred rating. Figure 7 is a graph of the input
RMS ripple current, normalized relative to output load current,
as a function of duty cycle that is adjusted for converter
efficiency. The ripple current calculation is written as
Equation 18:
Where:
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
I
IN_RMS NORMALIZED
- I
- x is a multiplier (0 to 1) corresponding to the inductor
- D is the duty cycle that is adjusted to take into account
D
peak-to-peak ripple amplitude expressed as a
percentage of I
the efficiency of the converter which is written as:
MAX
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
=
FIGURE 7. NORMALIZED RMS INPUT CURRENT
0
,
0
------------------------- -
V
is the maximum continuous I
IN
V
P-P
⋅
0.1
O
EFF
SW
is shared by a sufficient quantity of paralleled
0.2
. Take into account that the rated value of
MAX
0.3
=
(0% to 100%)
---------------------------------------------------------------------------------------------------- -
(
I
0.4
DUTY CYCLE
x = 1
x = 0.75
x = 0.50
x = 0.25
x = 0
MAX
12
2
0.5
⋅
(
D D
0.6
–
LOAD
I
2
MAX
)
0.7
)
+
of the converter
⎛
⎝
x I
0.8
⋅
MAX
0.9
(EQ. 18)
(EQ. 19)
2
⋅
----- -
12
D
1.0
⎞
⎠
ISL6228
MOSFET Selection and Considerations
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating. The
MOSFETs used in the power stage of the converter should
have a maximum V
upper voltage tolerance of the input power source and the
voltage spike that occurs when the MOSFET switches off.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred
high-side MOSFET emphasizes low gate charge so that the
device spends the least amount of time dissipating power in
the linear region. Unlike the low-side MOSFET which has the
drain-source voltage clamped by its body diode during turn
off, the high-side MOSFET turns off with V
spike, across it. The preferred low-side MOSFET
emphasizes low r
conduction loss.
For the low-side (LS) MOSFET, the power loss can be
assumed to be conductive only and is written as Equation 20:
For the high-side (HS) MOSFET, the its conduction loss is
written as Equation 21:
For the high-side MOSFET, the switching loss is written as
Equation 22:
Where:
Selecting The Bootstrap Capacitor
The selection of the bootstrap capacitor is written as
Equation 23:
Where:
P
P
P
C
CON_LS
CON_HS
SW_HS
BOOT
- I
- I
- t
- t
- Q
- ΔV
inductor current minus 1/2 of the inductor ripple current
current plus 1/2 of the inductor ripple current
saturation
high-side MOSFET
the boot capacitor each time the high-side MOSFET is
switched on
VALLEY
PEAK
ON
OFF
g
BOOT
is the total gate charge required to turn on the
=
is the time required to drive the device into
=
≈
is the time required to drive the device into cut-off
----------------------- -
ΔV
=
is the sum of the DC component of the inductor
I
V
---------------------------------------------------------------- -
LOAD
I
, is the maximum allowed voltage decay across
IN
Q
BOOT
LOAD
is the difference of the DC component of the
g
•
I
VALLEY
2
DS(ON)
2
r ⋅
DS
•
DS ON
r
DS ON
2
rating that exceeds the sum of the
(
(
•
t
when fully saturated to minimize
ON
)_LS
)_HS
•
f
SW
•
(
•
1 D
D
+
–
V
------------------------------------------------------------ -
IN
)
•
I
PEAK
IN
- V
2
•
OUT
t
OFF
, plus the
May 7, 2008
•
(EQ. 22)
(EQ. 20)
(EQ. 21)
(EQ. 23)
f
SW
FN9095.2