ISL6224EVAL1 Intersil, ISL6224EVAL1 Datasheet

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ISL6224EVAL1

Manufacturer Part Number
ISL6224EVAL1
Description
EVALUATION BOARD FOR ISL6224
Manufacturer
Intersil
Datasheets

Specifications of ISL6224EVAL1

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
2.5V
Current - Output
3A
Voltage - Input
4 ~ 24V
Regulator Topology
Buck
Frequency - Switching
300kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6224
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
The ISL6224 single PWM controller delivers high efficiency
and tight regulation from a voltage regulating synchronous
buck DC/DC converter. The ISL6224 PWM power supply
controller was designed especially for chip set and memory
bank applications in high performance notebook PCs, sub-
notebook PCs, and PDAs. The MOSFET drivers, output
voltage monitoring, output current monitoring, and protection
circuitry are included in a single 16 lead SSOP package. The
ISL6224EVAL1 evaluation board reference design provides
an efficient, cost effective and compact power solution.
High efficiency is maintained over a wide load range through
automatic selection of fixed frequency PWM synchronous
rectification mode, also known as continuous conduction
mode (CCM), or hysteretic diode emulation mode (HYS).
The IC enters CCM in response to heavy loads and (HYS)
mode in response to light loads, boosting efficiency. Forced
CCM (FCCM) disables hysteretic mode. Efficiency is further
enhanced by using the converters lower MOSFET R
as a current sense element. Voltage feed-forward duty-cycle
ramp modulation, average current mode control, and internal
feedback compensation provide fast response to input
voltage transients and output load transients.
The ISL6224 features output voltage adjustable in the range
from 0.9V to 5.5V and a selectable switching frequency of
either 300kHz or 600kHz. When operated from battery
voltages ranging from 4V to 24V, a switching frequency of
300kHz is recommended. When operating from 5V, a
switching frequency of 300kHz may be used or, to reduce
the size of the output filter, 600kHz may be used.
Quick Start Evaluation
Circuit Setup
The ISL6224EVAL1 board is designed for easy evaluation
using standard laboratory equipment. Refer to Table 2 for
the range of input and output voltages and currents.
Switch Settings
The ISL6224EVAL1 board is shipped with the four position
dip switch S1 set for 2.5V output. S1 controls the ENABLE
function “EN” and selects the output voltage. Figure 1
illustrates S1 position names and Table 1 describes the
function of each switch position.
®
1
Application Note
Single Output Mobile-Friendly PWM Controller
DS(ON)
1-888-INTERSIL or 321-724-7143
NOTE: If Vo #1, Vo #2 and Vo #3 switches are all down, then the
output voltage of the converter will be equal to Vref, which is 0.9 V.
Only one voltage selection switch is UP at any time.
Jumper Settings
Jumper JP1 enables or inhibits hysteretic mode. If the shunt
jumper is installed across the two pins located on the left, the
IC will be allowed to operate in hysteretic mode, should the
need arise. If the shunt jumper is installed across the two
pins located on the right, the IC will be forced into continuous
conduction mode. The evaluation board comes set for
hysteretic mode.
Jumper JP2 selects the optimum duty cycle ramp gain and
switching frequency. Jumper JP2 has three different
positions each of which will have one side of the shunt
jumper connected to the pin labeled “U3p1”. Refer to Table 2
for the recommended jumper position. The ISL6224EVAL1
board is shipped with JP2 in the “5V 300kHz” position.
JP3 is used to measure the current (ICC) drawn by the VCC
pin from the 5V power supply. When making efficiency
measurements that include VCC, be sure to measure ICC
from JP3. A substantial current is drawn by the red and
green LED and should not be included in determining the
efficiency of the converter.
POSITION
February 2003
Vo #1
Vo #2
Vo #3
TABLE 1. SWITCH S1 FUNCTIONAL DESCRIPTION
EN
All other trademarks mentioned are the property of their respective owners.
FIGURE 1. SWITCH S1 BIT POSITION NAMES
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
STATE
DOWN
DOWN
DOWN
DOWN
UP
UP
UP
UP
EN
Vo #3 (1.25V)
Vo #2 (2.5V)
Vo #1 (3.3V)
ENABLES CONVERTER
DISABLES CONVERTER
3.3V OUTPUT SELECTED
3.3V OUTPUT DESELECTED
2.5V OUTPUT SELECTED
2.5V OUTPUT DESELECTED
1.25V OUTPUT SELECTED
1.25V OUTPUT DESELECTED
FUNCTION
AN9983.1

Related parts for ISL6224EVAL1

ISL6224EVAL1 Summary of contents

Page 1

... Refer to Table 2 for the range of input and output voltages and currents. Switch Settings The ISL6224EVAL1 board is shipped with the four position dip switch S1 set for 2.5V output. S1 controls the ENABLE function “EN” and selects the output voltage. Figure 1 illustrates S1 position names and Table 1 describes the function of each switch position ...

Page 2

... FIGURE 2. SOFT-START ON 3.3V OUTPUT (2ms/Div) Output Ripple The ISL6224EVAL1 evaluation board is populated with one 330µF/6.3V SANYO POSCAP output capacitor which has 40mΩ ESR at 100kHz. Figures show the output voltage ripple and phase node voltage when the converter is operating in various modes and various combinations of VIN and Fs ...

Page 3

Evaluation Board Performance Graphs Vin=15 V, Fs= 300kHz Vripple = 34mV FIGURE 3. HYSTERETIC MODE AT ZERO LOAD CURRENT Vin=5 V, Fs=300kHz Vripple = 21mV FIGURE 5. HYSTERETIC MODE AT ZERO LOAD CURRENT 3 Application Note 9983 Vin=15 V, Fs=300kHZ ...

Page 4

Evaluation Board Performance Graphs Vin=5 V, Fs=600kHz Vripple = 19mV Phase Node FIGURE 7. HYSTERETIC MODE AT ZERO LOAD CURRENT ∆V = 98mV Vin=15 V, Fs=300kHz Vout=2.5V, AC Coupled, Load Current FIGURE 9. HYSTERETIC MODE TRANSIENT RESPONSE 4 Application Note ...

Page 5

Evaluation Board Performance Graphs ∆V = 84mV Vin=5 V, Fs=300kHz Load Current FIGURE 11. HYSTERETIC MODE TRANSIENT RESPONSE ∆V Vin=5 V, Fs=600kHz = 84mV Load Current FIGURE 13. HYSTERETIC MODE TRANSIENT RESPONSE 5 Application Note 9983 (Continued) Vin=5 V, Fs=300kHz ...

Page 6

... The value of Ioc and the value of Risen are inserted into the Rocset calculation on page 6 of the ISL6224 data sheet. The ISL6224EVAL1 evaluation board has been adjusted for 3.0 full load amps and approximately 6.3A peak inductor current for over current protection. Figure 15 shows a typical shutdown waveform when the load is over the limit ...

Page 7

... The voltage at the VSEN pin is internally compared to a 0.9V reference voltage and passed on to the next stage of the PWM generation circuits. On the ISL6224EVAL1 evaluation board the two resistor voltage divider feedback network consists of R10 (top resistor) and (R15 or R16 or R17) bottom resistors. Each bottom resistor chooses a different output voltage ...

Page 8

... Pgnd ISL6224 1.0uF FDS6912A 10V 1206 PGND GND PGND C19 0.1 uF 50V 0805 LXA3025IGC Vo#3 ENABLE 1.25V R14 R16 100K 30. 0805 0805 BSS123LT1 SOT23 4 3 FIGURE 20. ISL6224EVAL1 EVALUATION BOARD SCHEMATIC C23 C24 1812 1812 1812 1812 1812 1812 1812 1812 SMB ...

Page 9

... TABLE 4. BILL OF MATERIALS REV B FOR ASSEMBLY ISL6224EVAL1 REFERENCE ITEM QTY UNITS DESIGNATOR CR1 C13 C4, C10 C11 C12 C18, C22, C25 C19 C20 C15 R10 R11, R14, R19 R12, R13 R15 R16 R17 9 Application Note 9983 DESCRIPTION LED, SMD, 4P, POLARIZED, RED/GRN CAP, OSCON, RADIAL, F-SIZE, 56µ ...

Page 10

... TABLE 4. BILL OF MATERIALS REV B FOR ASSEMBLY ISL6224EVAL1 (Continued) REFERENCE ITEM QTY UNITS DESIGNATOR TP1, TP2, TP3 TP4, TP5 J1, J2, J3, J4, J6, J7, J8, J12 JP1, JP2 JP3 JP1, JP2, JP3 C2, C3, C6, C7, C8, C16, C17, C21, C23, C24, D1, D4, L3, U1 Application Note 9983 DESCRIPTION RESISTOR, TF, 0805, 1 ...

Page 11

Silk Screens FIGURE 21. TOP LAYER FIGURE 23. BOTTOM LAYER 11 Application Note 9983 FIGURE 22. SILK SCREEN TOP FIGURE 24. SILK SCREEN BOTTOM ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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