AS1339 EB austriamicrosystems, AS1339 EB Datasheet - Page 22

• Manufacturer Part Number: AS1339 EB
• Description: BOARD EVAL AS1339
• Manufacturer: austriamicrosystems

Specifications of AS1339 EB

• Main Purpose: DC/DC, Step Down with LDO
• Outputs And Type: 3, Non-Isolated
• Voltage - Output: 0.8 ~ 3.75 V, 2.85V, 2.85V
• Current - Output: 650mA
• Voltage - Input: 2.7 ~ 5.5 V
• Regulator Topology: Buck
• Frequency - Switching: 2MHz
• Board Type: Fully Populated
• Utilized Ic / Part: AS1339
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Power - Output: -

AS1339
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Layout Considerations
Please carefully observe that large peak currents of up to 1.1A and high switching frequencies will make the PCB lay-
out a very important part of the system performance and compliance. A proper PCB design will minimize electro mag-
netic interference (EMI) as well as voltage gradients in the ground plane, which both can result in application
instabilities. Please closely follow the guidelines as mentioned below.
Please note the following PCB layout considerations shown in
Figure 54. Layout for Space Limited Applications
www.austriamicrosystems.com/DC-DC_Step-Down/AS1339
- Keep the power traces as short and wide as possible (IN1A, IN1B, IN2, LX, PAA, PAB, PGND)
- Place all capacitors as close as possible to the pins of the device
- Avoid voltage gradients in the ground plane
- The negative terminals of COUT and CIN1/CIN2 are kept as close as possible to each other. It is recommended
- The current path between pins IN1A/IN1B (C3/C4) and pin PGND (A4) via CIN1 is routed very short
- The current path between pins PAB/PAA (D3/D4) and pin PGND (A4) via COUT is routed very short
- The connection between LX (B4) and pins PAB/PAA (D3/D4) via the coil (L) is routed very short
- To keep the cross-coupling between the LDOs and DC/DC minimized, in regard to supply ripple and noise induc-
- To prevent voltage gradients between AGND (A2) and PGND (A4), these pins are connected via a short, low
to connect these terminals directly to PGND at a star point.
tion, the IN1 and IN2 path are separated. Both power inputs should be connected at a star point directly at the
main supply
ohmic, trace to each other.
Revision 1.05
Figure
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