HI5760EVAL1 Intersil, HI5760EVAL1 Datasheet - Page 4

• Manufacturer Part Number: HI5760EVAL1
• Description: EVALUATION PLATFORM SOIC HI5760
• Manufacturer: Intersil

Specifications of HI5760EVAL1

• Number Of Dac's: 1
• Number Of Bits: 10
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 125M
• Data Interface: Parallel
• Settling Time: 35ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: HI5760
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

HSP-Eval Setup for DDS
Attach the HSP-EVAL and the HSP45116 Daughter Board
together. Consult their respective user manuals for details.
Connect the HI5760EVAL1 board to the P2 connector of
the HSPEVAL board. Then connect these to an IBM
compatible PC via the parallel port. Provide power to both
boards. To run the software (NCOMCTRL) that
accompanied the HSP evaluation kit, place the diskette into
the A: drive of the PC and type:
A:\NCOMCTRL,
which will run the HSP45116 Control Panel software. Set
the control panel’s selections to the following and check the
output of the DAC at either IOUTA or IOUTB for a frequency
equal to 1.63MHz.
The clock select of the control panel should be set to ‘Osc.
CLK’. The control signals should be as follows:
0ENPHREG
0CLROFR
1LOAD
0BINFMT
1PMSEL
The amplitude of the real output (RIN0-15) should be 8000
for full scale output. The center frequency register can be set to
10ABCDEF
Phase Offset, and Time Accumulator Registers should all be
set to zeros. The spurious free dynamic range that can be
expected is typically 70dBc with this setup operating at this
frequency.
Appendix B Pin Descriptions
PIN NO.
11-14
1-10
15
16
17
18
19
20
21
22
23
24
25
26
27
28
D9 (MSB) Through
HEX
PIN NAME
D0 (LSB)
COMP1
COMP2
REFLO
SLEEP
for a 1.63MHz tone. The Offset Frequency,
REFIO
FSADJ
IOUTB
IOUTA
DCOM
ACOM
AV
DV
CLK
NC
NC
DD
DD
3-4
Digital data bit-9, (most significant bit) through digital data bit-0, (least significant bit).
No Connect. Recommend ground.
Control Pin for Power-Down Mode. Sleep mode is active high; Connect to ground for normal mode. Sleep pin has
internal 20 A active pull-down current.
Connect to analog ground to enable internal 1.2V reference or connect to AV
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is enabled. Use
0.
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full scale output
current = 32 x V
For use in reducing bandwidth/noise. Recommended: Connect 0.1 F to AV
Analog Ground.
The complementary current output of the device. Full scale output current is achieved when all input bits are set
to binary 0.
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
Connect to ACOM directly or through a 0.1 F capacitor.
Analog supply (+3V to +5V).
No connect.
Digital ground.
Digital supply (+3V to +5V).
Input for clock. Positive edge of clock latches data.
F cap to ground when internal reference is enabled.
REFIO
Application Notes 9821
/R
SET
.
HEX
Appendix A Description of Architecture
The segmented current source architecture has the ability to
improve the converter’s performance by reducing the amount
of current that is switching at any one time. In traditional
architectures, major transition points required the converter to
switch on or off large amounts of current. In a traditional 10-bit
R/2R ladder design, for example, the midscale transition
required approximately equal amounts of currents switching
on and off. In a segmented current source arrangement,
transitions such as midscale become one in which you simply
have an additional intermediate current source turning on and
several minor ones turning off. In the case of the HI5760,
there are 31 intermediate current segments that represent the
5 MSBs and five, binary-weighted current sources
representing each of the five LSBs. See the Functional Block
Diagram in the datasheet for a visual representation. To relate
the midscale transition example to the HI5760, consider the
following: The code 0111111111 would be represented by 15
intermediate current segments and each of the 5 LSB current
sources all turned on. To transition to code 1000000000 would
simply require turning off the 5 LSB current sources and
turning on the next intermediate current segment, bringing the
total amount of current switching at this ‘major’ code transition
equal to the same amount switching at 30 other code
transition points in the code ramp from 0 to 1023, so that the
total glitch energy is distributed more evenly.
PIN DESCRIPTION
DD
DD
.
to disable internal reference.