AS1115 DB-RED austriamicrosystems, AS1115 DB-RED Datasheet - Page 18

• Manufacturer Part Number: AS1115 DB-RED
• Description: BOARD DEMO AS1115 RED
• Manufacturer: austriamicrosystems

Specifications of AS1115 DB-RED

• Current - Output / Channel: *
• Outputs And Type: 8, Non-Isolated
• Voltage - Output: *
• Features: 64 LED + 16 keys, I⊃2C
• Voltage - Input: 2.7 ~ 5.5 V
• Utilized Ic / Part: AS1115
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

AS1115
Datasheet - D e t a i l e d D e s c r i p t i o n
Feature Register (0x0E)
The Feature Register is used for enabling various features including switching the device into external clock mode,
applying an external reset, selecting code-B or HEX decoding, enabling or disabling blinking, setting the blinking rate,
and resetting the blink timing.
Note: At power-up the Feature Register is initialized to 0.
Table 20. Feature Register Summary
Table 21. Feature Register Bit Descriptions (Address (HEX) = 0xXE)
www.austriamicrosystems.com/LED-Driver-ICs/AS1115
Bit
D0
D1
D2
D3
D4
D5
D6
D7
blink_
Addr: 0xXE
start
D7
blink_freq_sel
decode_sel
blink_start
Bit Name
blink_en
reg_res
clk_en
sync
NU
sync
D6
Feature Register
Enables and disables various device features.
Default
0
0
0
0
0
0
0
freq_sel
blink_
D5
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
External clock active.
0 = Internal oscillator is used for system clock.
1 = Pin CLK of the serial interface operates as system clock input.
Resets all control registers except the Feature Register.
0 = Reset Disabled. Normal operation.
1 = All control registers are reset to default state (except the Feature
Register) identically after power-up.
Note: The Digit Registers maintain their data.
Selects display decoding for the selected digits
0 = Enable Code-B decoding (see
1 = Enable HEX decoding (see
Not used
Enables blinking.
0 = Disable blinking. 1 = Enable blinking.
Sets blink with low frequency (with the internal oscillator enabled):
0 = Blink period typically is 1 second (0.5s on, 0.5s off).
1 = Blink period is 2 seconds (1s on, 1s off).
Synchronizes blinking on the rising edge of pin LD/CS. The multiplex
and blink timing counter is cleared on the rising edge of pin LD/CS. By
setting this bit in multiple devices, the blink timing can be synchronized
across all the devices.
Start Blinking with display enabled phase. When bit D4 (blink_en) is set,
bit D7 determines how blinking starts.
0 = Blinking starts with the display turned off.
1 = Blinking starts with the display turned on.
blink_en
D4
Revision 1.07
NU
D3
Bit Description
decode_sel
Table 10 on page
D2
Table 9 on page
reg_res
(Table 8 on page
D1
14).
14).
clk_en
D0
13).
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