AS1116 DB-BLUE austriamicrosystems, AS1116 DB-BLUE Datasheet - Page 8

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AS1116 DB-BLUE

Manufacturer Part Number
AS1116 DB-BLUE
Description
BOARD DEMO AS1116 BLUE
Manufacturer
austriamicrosystems
Datasheets

Specifications of AS1116 DB-BLUE

Current - Output / Channel
*
Outputs And Type
8, Non-Isolated
Voltage - Output
*
Features
64 LED Driver with Error Detection, SPI
Voltage - Input
2.7 ~ 5.5 V
Utilized Ic / Part
AS1116
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
AS1116
Datasheet - D e t a i l e d D e s c r i p t i o n
Serial-Addressing Format
The AS1116 contains a 16bit SPI interface to access the internal data and control registers of the device
and Control-Registers on page
indicates the beginning of an access on the SPI interface, the rising edge on LD determines an access on SPI. An
access must consist of exactly 16bits for write operation and 8bits for read operation. Timing restrictions on the SPI
interface pins are defined in
Table 6
ation.
D0 (write operation) / D8 (read operation) is the first bit to shift into the SPI interface after the falling edge of LD, is the
last bit to write to SPI before rising edge of LD.
At a read operation an 8bit operation is executed. At the first rising edge of SCL after the rising edge of LD D7 of
addressed register is written to SDO pin. At the next rising edge of SCL D6 is written to SDO pin. LD must be kept high
during reading data from a internal data or control register of AS1116.
Table 6. 16-Bit Serial Data Format
Figure 17. Read operation
Figure 18. Interface Timing
Initial Power-Up
On initial power-up, the AS1116 registers are reset to their default values, the display is blanked, and the device goes
into shutdown mode. At this time, all registers should be programmed for normal operation.
Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control
www.austriamicrosystems.com/LED-Driver-ICs/AS1116
LSB
D0
SDO
SCL
shows the structure of the 16bit command word for writing data,
SDI
Register
SDO
D1
SCL
LD
LD
D2
(see page
1
D3
Data
13) is set to the minimum values.
t
D4
CSS
Figure
t
DS
D0
9). The SPI interface is driven with the rising edge of SCL. A falling edge on LD signal
t
DH
18.
D5
t
D6
CL
D1
8
D7
MSB
t
D7
CH
9
D6
Revision 1.05
10
D5
D8
Register Address (see
D4
D3
D9
D2 D1
Table 7
D14
D10
D0
the 8bit command word for read oper-
t
CP
16
t
D11
DO
Table
D15
7)
D12
t
CSH
D13
t
0
LDCK
t
CSW
(see Digit-
D14
R/W
D15
8 - 20
X

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