ISL9000MMEV2 Intersil, ISL9000MMEV2 Datasheet - Page 8
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ISL9000MMEV2
Manufacturer Part Number
ISL9000MMEV2
Description
EVAL BOARD 3.0V/3.0V ISL9000MM
Manufacturer
Intersil
Datasheet
1.ISL9000BJEV2.pdf
(11 pages)
Specifications of ISL9000MMEV2
Channels Per Ic
2 - Dual
Voltage - Output
3V, 3V
Current - Output
300mA, 200mA
Voltage - Input
2.3 ~ 6.5 V
Regulator Type
Positive Fixed
Operating Temperature
-40°C ~ 85°C
Board Type
Fully Populated
Utilized Ic / Part
ISL9000
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Pin Description
Typical Application
NUMBER
PIN
10
1
2
3
4
5
6
7
8
9
VIN (2.3 TO 6.5V)
ENABLE1
ENABLE2
NAME
CPOR
CBYP
POR1
POR2
GND
VO2
VO1
EN1
EN2
PIN
VIN
OFF
OFF
Open Drain Output (1mA) Open-drain POR Output for LDO-1 (active-low):
Open Drain Output (1mA) Open-drain POR Output for LDO-2 (active-low):
Low Voltage Compatible
Low Voltage Compatible
ON
ON
CMOS Input
CMOS Input
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Analog I/O
8
Ground
C1
TYPE
C1, C4, C5: 1µF X5R ceramic capacitor
C2: 0.1µF X7R ceramic capacitor
C3: 0.01µF X7R ceramic capacitor
C2
C3
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
LDO-1 Enable.
LDO-2 Enable.
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 1µF between this pin and GND to tune in the
desired noise and PSRR performance.
POR2 Delay Setting Capacitor Pin:
Connect a capacitor between this pin and GND to delay the POR2 output release after LDO-2
output reaches 94% of its specified voltage level. (200ms delay per 0.01µF).
GND is the connection to system ground. Connect to PCB Ground plane.
Internally connected to VO1 through 100kΩ resistor.
Internally connected to VO2 through 100kΩ resistor.
LDO-2 Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
LDO-1 Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
1
2
3
4
5
VIN
EN1
EN2
CBYP
CPOR
ISL9000
ISL9000
POR2
POR1
GND
VO1
VO2
10
9
8
7
6
C4
C5
DESCRIPTION
VOUT 2 TOO LOW
VOUT 1 TOO LOW
VOUT 2 OK
VOUT 1 OK
VOUT 1
VOUT 2
RESET 2
(200ms delay,
C3 = 0.01µF)
RESET 1
(2ms delay)
March 11, 2008
FN9217.4