EVK1060A Atmel, EVK1060A Datasheet - Page 22

• Manufacturer Part Number: EVK1060A
• Description: KIT EVAL FOR AT42QT1060-MMU
• Manufacturer: Atmel
• Series: Quantum, QTouch™r

Specifications of EVK1060A

• Sensor Type: Touch, Capacitive
• Sensing Range: 1 Button/Key
• Interface: I²C
• Sensitivity: 2mm ~ 5mm Pad Widths
• Voltage - Supply: 3V
• Embedded: No
• Utilized Ic / Part: AT42QT1060
• Silicon Manufacturer: Atmel
• Silicon Core Number: AT42QT1060-MMU
• Kit Application Type: Sensing - Touch / Proximity
• Application Sub Type: Capacitive Touch
• Silicon Family Name: QT1060
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.15
6.16
6.17
6.18
22
Address 25: AKS Mask
Address 26: PWM Mask
Address 27: Detection Mask
Address 28: Active Level Mask
AT42QT1060
Table 6-15.
Table 6-16.
Table 6-17.
Table 6-18.
KEY0 – 5 (AKS Mask): these bits control which keys are included in the AKS group. A
the corresponding key is included in the AKS group and may only go into detect when it has the
largest signal change of any key in the group. A 0 means that it is excluded and can go into
detect whenever its threshold is passed.
Default: 0x00 (no keys are within the AKS group)
IO0 – 6 (PWM Mask): these bits control which IOs that are configured as outputs, and its user
output buffer activated, will output a PWM signal. A
signal, a 0 means the output generates a logic level. The active level of the output (both logical
and PWM) is determined by the Active level mask. See
precedence and example usage.
Default: 0x00 (PWM is off on all IOs)
IO0 – 6 (Detection Mask): these bits control which IOs that are configured as outputs will be
controlled by their corresponding capacitive key. A
output when key “n” is detecting a touch. A 0 means that the output is controlled by the output
buffer. See
Default: 0x3F (all IOs are controlled by key status)
IO0 – 6 (Active Level Mask): these bits control the active logic level for the IOs that are
configured as outputs. A
output is active low. See
Default: 0 (all IOs are active low output)
Address
Address
Address
Address
25
26
27
28
Section 6.24 on page 24
Reserved Reserved
Reserved
Reserved
Reserved
AKS Mask
PWM Mask
Detection Mask
Active Level Mask
b7
b7
b7
b7
1
Section 6.24
IO6
IO6
IO6
means the output generates an active high output, a 0 means that the
b6
b6
b6
b6
KEY5
IO5
IO5
IO5
for I/O register precedence and example usage.
b5
b5
b5
b5
for IO register precedence and example usage.
KEY4
IO4
IO4
IO4
b4
b4
b4
b4
1
means the output “n” generates an active
1
Section 6.24 on page 24
KEY3
means the output generates a PWM
IO3
IO3
IO3
b3
b3
b3
b3
KEY2
IO2
IO2
IO2
b2
b2
b2
b2
KEY1
IO1
IO1
IO1
b1
b1
b1
b1
for I/O register
9505E–AT42–02/09
1
KEY0
means
IO0
IO0
IO0
b0
b0
b0
b0