MCP9800DM-DL2 Microchip Technology, MCP9800DM-DL2 Datasheet - Page 17

BOARD DEMO 2 FOR MCP9800

MCP9800DM-DL2

Manufacturer Part Number
MCP9800DM-DL2
Description
BOARD DEMO 2 FOR MCP9800
Manufacturer
Microchip Technology

Specifications of MCP9800DM-DL2

Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C, SMBus
Sensitivity
±0.5°C
Voltage - Supply
2.7 V ~ 5.5 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP9800
Processor To Be Evaluated
MCP9800, MCP101, PIC10F202, 24LC16B
Interface Type
I2C
Lead Free Status / RoHS Status
Not applicable / Not applicable
5.1.5
After the start condition, each bit of data in transmission
needs to be settled for time specified by t
before SCLK toggles from low-to-high (refer to the
Serial Interface Timing Specification).
5.1.6
Each receiving device, when addressed, is obliged to
generate an acknowledge bit after the reception of
each byte. The master device must generate an extra
clock pulse for ACK to be recognized.
The acknowledging device has to pull down the SDA
line for t
SCLK from the Master and remains pulled down for
t
During read, the master must signal an End-of-Data
(EOD) to the slave by not generating an ACK bit once
the last bit has been clocked out of the slave. In this
case, the slave will leave the data line released to
enable the master to generate the stop condition.
 2004 Microchip Technology Inc.
H-DATA
after high-to-low transition of SCLK.
SU-DATA
DATA VALID
ACKNOWLEDGE (ACK)
before the low-to-high transition of
SU-DATA
5.1.7
If the SCLK stays low for time specified by t
MCP9802/03 resets the serial interface. This dictates
the minimum clock speed as specified in the SMBus
specification. The I
clock speed and, therefore, the master can hold the
clock indefinitely to process data (MCP9800/01 only).
TIME OUT (MCP9802/03)
MCP9800/1/2/3
2
C bus specification does not limit
DS21909B-page 17
OUT
, the

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