AT91SAM9G20-EK Atmel, AT91SAM9G20-EK Datasheet - Page 14

• Manufacturer Part Number: AT91SAM9G20-EK
• Description: KIT EVAL FOR AT91SAM9G20 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G20-EK

• Contents: Board, Cables, CD, Power Supply
• Processor To Be Evaluated: AT91SAM9G20
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• Core: RISC
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: ARM926EJ-S
• Silicon Core Number: AT91SAM9G20
• Silicon Family Name: ARM
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM9G20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6413C–ATARM–18-Feb-09
Board Description
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Power Management Controller (PMC)
Advanced Interrupt Controller (AIC)
Debug Unit (DBGU)
Periodic Interval Timer (PIT)
Watchdog Timer (WDT)
Real-time Timer (RTT)
One 4-channel 10-bit Analog-to-Digital Converter
Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
Peripheral DMA Controller Channels (PDC)
One Two-slot MultiMedia Card Interface (MCI)
One Synchronous Serial Controller (SSC)
Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Two 2-wire UARTs
Two Master/Slave Serial Peripheral Interfaces (SPI)
Two Three-channel 16-bit Timer/Counters (TC)
One Two-wire Interface (TWI)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
– Two Programmable External Clock Signals
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
– 2-wire UART and Support for Debug Communication Channel, Programmable ICE Access Prevention
– 20-bit Interval Timer plus 12-bit Interval Counter
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– All I/O Lines are Schmitt Trigger Inputs
– SDCard/SDIO and MultiMediaCard
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Signal Control on USART0
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Synchronous Communications
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in
Encoding/Decoding
Master Mode
™
Compliant
®
Infrared Modulation/Demodulation, Manchester
AT91SAM9G20-EK Evaluation Board User Guide