STM8/128-EVAL STMicroelectronics, STM8/128-EVAL Datasheet - Page 13

• Manufacturer Part Number: STM8/128-EVAL
• Description: BOARD EVAL FOR STM8S
• Manufacturer: STMicroelectronics
• Type: MCUr

Specifications of STM8/128-EVAL

• Mfg Application Notes: STM8S Getting Started
• Contents: Evaluation Board
• Silicon Manufacturer: ST Micro
• Core Architecture: STM8
• Core Sub-architecture: STM8
• Silicon Core Number: STM8
• Silicon Family Name: STM8S2xx
• Kit Contents: Board
• For Use With/related Products: STM8S2xx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8506

STM8S207xx, STM8S208xx
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4.1
Product overview
The following section intends to give an overview of the basic features of the STM8S20xxx
performance line functional modules and peripherals.
For more detailed information please refer to the corresponding family reference manual
(RM0016).
Central processing unit STM8
The 8-bit STM8 core is designed for code efficiency and performance.
It contains 6 internal registers which are directly addressable in each execution context, 20
addressing modes including indexed indirect and relative addressing and 80 instructions.
Architecture and registers
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Addressing
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Instruction set
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Harvard architecture
3-stage pipeline
32-bit wide program memory bus - single cycle fetching for most instructions
X and Y 16-bit index registers - enabling indexed addressing modes with or without
offset and read-modify-write type data manipulations
8-bit accumulator
24-bit program counter - 16-Mbyte linear memory space
16-bit stack pointer - access to a 64 K-level stack
8-bit condition code register - 7 condition flags for the result of the last instruction
20 addressing modes
Indexed indirect addressing mode for look-up tables located anywhere in the address
space
Stack pointer relative addressing mode for local variables and parameter passing
80 instructions with 2-byte average instruction size
Standard data movement and logic/arithmetic functions
8-bit by 8-bit multiplication
16-bit by 8-bit and 16-bit by 16-bit division
Bit manipulation
Data transfer between stack and accumulator (push/pop) with direct stack access
Data transfer using the X and Y registers or direct memory-to-memory transfers
Doc ID 14733 Rev 11
Product overview
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