EVB9S08DZ60 Freescale Semiconductor, EVB9S08DZ60 Datasheet - Page 354
EVB9S08DZ60
Manufacturer Part Number
EVB9S08DZ60
Description
BOARD EVAL FOR 9S08DZ60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(2 pages)
3.EVB9S08DZ60.pdf
(32 pages)
4.EVB9S08DZ60.pdf
(13 pages)
5.EVB9S08DZ60.pdf
(4 pages)
Specifications of EVB9S08DZ60
Contents
Module and Misc Hardware
Processor To Be Evaluated
S08D
Data Bus Width
8 bit
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08D
Kit Contents
Board Cables CD Power Supply
Rohs Compliant
Yes
For Use With/related Products
MC9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EVB9S08DZ60
Manufacturer:
TI
Quantity:
101
- DEMO9S08DZ60 PDF datasheet
- EVB9S08DZ60 PDF datasheet #2
- EVB9S08DZ60 PDF datasheet #3
- EVB9S08DZ60 PDF datasheet #4
- EVB9S08DZ60 PDF datasheet #5
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Chapter 17 Development Support
17.2.3
BDC commands are sent serially from a host computer to the BKGD pin of the target HCS08 MCU. All
commands and data are sent MSB-first using a custom BDC communications protocol. Active background
mode commands require that the target MCU is currently in the active background mode while
non-intrusive commands may be issued at any time whether the target MCU is in active background mode
or running a user application program.
Table 17-1
meaning of each command.
Coding Structure Nomenclature
This nomenclature is used in
354
AAAA
WBKP
WD16
RBKP
RD16
WD
RD
CC
SS
d
/
shows all HCS08 BDC commands, a shorthand description of their coding structure, and the
BDC Commands
=
=
=
=
=
=
=
=
=
=
=
Commands begin with an 8-bit hexadecimal command code in the host-to-target
direction (most significant bit first)
separates parts of the command
delay 16 target BDC clock cycles
a 16-bit address in the host-to-target direction
8 bits of read data in the target-to-host direction
8 bits of write data in the host-to-target direction
16 bits of read data in the target-to-host direction
16 bits of write data in the host-to-target direction
the contents of BDCSCR in the target-to-host direction (STATUS)
8 bits of write data for BDCSCR in the host-to-target direction (CONTROL)
16 bits of read data in the target-to-host direction (from BDCBKPT breakpoint
register)
16 bits of write data in the host-to-target direction (for BDCBKPT breakpoint register)
Table 17-1
MC9S08DZ60 Series Data Sheet, Rev. 4
to describe the coding structure of the BDC commands.
Freescale Semiconductor
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