702065 Spectrum Digital Inc, 702065 Datasheet - Page 20

• Manufacturer Part Number: 702065
• Description: MODULE EVAL FOR DM355
• Manufacturer: Spectrum Digital Inc
• Series: DaVinci™r
• Type: MCUr

Specifications of 702065

• Contents: Board, Batteries, Cables, CD, Power Supply, Remote
• Operating Frequency: 216 MHz
• Interface Type: RS-232, Ethernet, USB, JTAG
• Operating Supply Voltage: 5 V
• Board Size: 127 mm x 165 mm
• Software: Software Included
• Silicon Family Name: DaVinci - TMS320DM35x
• Core Architecture: C6000
• Core Sub-architecture: ARM9 / DSP
• Ic Product Type: Digital Video Evaluation Module
• For Use With/related Products: TMS320DM355
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Spectrum Digital, Inc
2.2.2 AIC33 Interface
2-4
The EVM uses a Texas Instruments TLV320AIC33 stereo codec for input and output of
audio signals. The codec samples analog signals on the microphone or line inputs and
converts them into digital data so it can be processed by the DSP. When the DSP is
finished with the data it uses the codec to convert the samples back into analog signals
on the line output so the user can hear the output.
The codec communicates using two serial channels, one to control the codec’s internal
configuration registers and one to send and receive digital audio samples. The I
is used as the AIC33’s control channel. The control channel is generally only used
when configuring the codec, it is typically idle when audio data is being transmitted,
McBSP1 is used as the bi-directional data channel. All audio data flows through the
data channel. Many data formats are supported based on the three variables of
sample width, clock signal source and serial data format. The EVM examples generally
use a 16-bit sample width with the codec in master mode so it generates the frame
sync and bit clocks at the correct sample rate without effort on the DSP side.
The codec is clocked via a 27 Mhz oscillator. The internal sample rate generator
subdivides the default system clock to generate common audio frequencies. The
sample rate is set by a codec register. The figure below shows the codec interface on
the DM355 EVM.
SCL
SDA
DR
DX
CLKR
CLKX
FSR
FSX
McBSP
I2S Format
I
2
Control
C Format
Digital
I
2
C
Figure 2-2, DM355 EVM CODEC INTERFACE
WCLK
DOUT
BCLK
SDA
SCL
DIN
ADC
AIC33 Codec
Control Registers
DAC
DM355 EVM Technical Reference
MIC IN
LINE IN
LINE OUT
HP OUT
Analog
LINE OUT
HP OUT
LINE IN
MIC IN
2
C bus