ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 36
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ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
10.1
10.2
10.2.1
10.2.2
10.2.3
10.3
10.4
36
System Controller and Peripherals Mapping
Power-on-Reset, Brownout and Supply Monitor
Reset Controller
Supply Controller (SUPC)
SAM3S Summary
Power-on-Reset
Brownout Detector on VDDCORE
Supply Monitor on VDDIO
Please refer to
All the peripherals are in the bit band region and are mapped in the bit band alias region.
The SAM3S embeds three features to monitor, warn and/or reset the chip:
• Power-on-Reset on VDDIO
• Brownout Detector on VDDCORE
• Supply Monitor on VDDIO
The Power-on-Reset monitors VDDIO. It is always activated and monitors voltage at start up but
also during power down. If VDDIO goes below the threshold voltage, the entire chip is reset. For
more information, refer to the Electrical Characteristics section of the datasheet.
The Brownout Detector monitors VDDCORE. It is active by default. It can be deactivated by soft-
ware through the Supply Controller (SUPC_MR). It is especially recommended to disable it
during low-power modes such as wait or sleep modes.
If VDDCORE goes below the threshold voltage, the reset of the core is asserted. For more infor-
mation, refer to the Supply Controller (SUPC) and Electrical Characteristics sections of the
datasheet.
The Supply Monitor monitors VDDIO. It is not active by default. It can be activated by software
and is fully programmable with 16 steps for the threshold (between 1.9V to 3.4V). It is controlled
by the Supply Controller (SUPC). A sample mode is possible. It allows to divide the supply mon-
itor power consumption by a factor of up to 2048. For more information, refer to the SUPC and
Electrical Characteristics sections of the datasheet.
The Reset Controller is based on a Power-on-Reset cell, and a Supply Monitor on VDDCORE.
The Reset Controller is capable to return to the software the source of the last reset, either a
general reset, a wake-up reset, a software reset, a user reset or a watchdog reset.
The Reset Controller controls the internal resets of the system and the NRST pin input/output. It
is capable to shape a reset signal for the external devices, simplifying to a minimum connection
of a push-button on the NRST pin to implement a manual reset.
The configuration of the Reset Controller is saved as supplied on VDDIO.
The Supply Controller controls the power supplies of each section of the processor and the
peripherals (via Voltage regulator control)
The Supply Controller has its own reset circuitry and is clocked by the 32 kHz Slow clock
generator.
Section 8-1 “SAM3S Product Mapping” on page
30.
6500CS–ATARM–24-Jan-11