45300 Parallax Inc, 45300 Datasheet - Page 127
![BOARD PROTO SX48](/photos/9/25/92507/mfg_45300_sml.jpg)
45300
Manufacturer Part Number
45300
Description
BOARD PROTO SX48
Manufacturer
Parallax Inc
Type
MCUr
Specifications of 45300
Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SX48
For Use With
130-28029 - KIT PARTS SMART SENSORS45111 - MANUAL FOR SX-KEY/BLITZ VER. 2.028850 - CARRIER BOARD BOARD OF EDU USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
453001
Manufacturer:
LITTELFUSE/力特
Quantity:
20 000
Company:
Part Number:
453002
Manufacturer:
LITTELFU
Quantity:
1 000
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CLR
Operation: dest is cleared to 0. Z is set to 1 in command #1 and #2 while TO and PD are set to 1 in command #3.
CLRB
Operation: dest_bit is cleared to 0.
CLZ
Operation: The Z flag is cleared to 0.
CSA
Operation: op1 is compared to op2. If op1 is greater than op2, the following instruction word is skipped. W is left
Note:
1) CLR
2) CLR
3) CLR
1) CLRB
1) CLZ
1) CSA
2) CSA
Command
Command
Command
Command
dest
fr
W
!WDT
Prescaler is also cleared in command #3, if assigned.
dest_bit
op.bit
op1, op2
fr, #literal
fr1, fr2
holding the result of op1 + ~op2 in command #1 and op2 - op1 in command #2. If CARRYX is specified, c
affects the result. Insert a CLC before command #1 and an STC before command #2 to avoid strange results.
Only one word is skipped by this instruction. To avoid strange results, make sure that any instruction
following CSA is a single-word instruction.
Words
Words
Words
Words
1
1
1
1
1
3
3
3 or 4 (skip)
3 or 4 (skip)
(12 or 16)
(12 or 16)
Cycles
Cycles
Cycles
Cycles
1 (4)
1 (4)
1 (4)
1 (4)
1 (4)
13 Appendix C: SX Instruction Set
SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. Page 127
W, C, DC, Z
W, C, DC, Z
TO, PD
Affects
Affects
Affects
Affects
op.bit
W, Z
fr, Z
Z
Compare op1 to op2 and skip if above
0000 011f ffff CLR fr
0000 0100 0000 CLR w
0000 0000 0100 CLR wdt
0100 bbbf ffff CLRB op.bit
0100 0100 0011 CLZ
1100 kkkk kkkk MOV W, #lit^$FF
0001 110f ffff ADD W, fr
0111 0000 0011 SC
0010 000f ffff MOV W, fr1
0000 100f ffff MOV W, fr2-W
0110 0000 0011 SNC
Coding
Coding
Coding
Coding
Clear dest_bit
Clear dest
Clear zero
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