ST7MDT2-EPB2/US STMicroelectronics, ST7MDT2-EPB2/US Datasheet - Page 52

• Manufacturer Part Number: ST7MDT2-EPB2/US
• Description: BOARD PROGRAMMING SGL POS ST7
• Manufacturer: STMicroelectronics
• Type: MCUr

Specifications of ST7MDT2-EPB2/US

• Contents: Programmer Board
• For Use With/related Products: ST72311, ST72124, ST72314, ST72334
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST72334J/N, ST72314J/N, ST72124J
14.2 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK TIMER (MCC/RTC)
The Main Clock Controller consists of three differ-
ent functions:
Each function can be used independently and si-
multaneously.
14.2.1 Programmable CPU clock prescaler
The programmable CPU clock prescaler supplies
the clock for the ST7 CPU and its internal periph-
erals. It manages SLOW power saving mode (See
Section 11.2 "SLOW MODE" on page 35
details).
The prescaler selects the f
cy and is controlled by three bits in the MISCR1
register: CP[1:0] and SMS.
CAUTION: The prescaler does not act on the CAN
peripheral clock source. This peripheral is always
supplied by the f
Figure 30. Main Clock Controller (MCC/RTC) Block Diagram
52/153
MCC/RTC INTERRUPT
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real time clock timer with interrupt capability
f
OSC
MCCSR
0
0
DIV 2
OSC
0
/2 clock source.
0
CPU
TB1 TB0 OIE
f
OSC
COUNTER
RTC
main clock frequen-
/2
MISCR1
-
-
for more
OIF
MCO
ALTERNATE
FUNCTION
PORT
-
DIV 2, 4, 8, 16
14.2.2 Clock-out capability
The clock-out capability is an alternate function of
an I/O port pin that outputs a f
external devices. It is controlled by the MCO bit in
the MISCR1 register.
CAUTION: When selected, the clock out pin sus-
pends the clock during ACTIVE-HALT mode.
14.2.3 Real time clock timer (RTC)
The counter of the real time clock timer allows an
interrupt to be generated based on an accurate
real time clock. Four different time bases depend-
ing directly on f
tionality is controlled by four bits of the MCCSR
register: TB[1:0], OIE and OIF.
When the RTC interrupt is enabled (OIE bit set),
the ST7 enters ACTIVE-HALT mode when the
HALT instruction is executed. See
"ACTIVE-HALT AND HALT MODES" on page 37
for more details.
-
CP1 CP0
SMS
OSC
are available. The whole func-
f
CPU
OSC
PERIPHERALS
TO CPU AND
CPU CLOCK
/2 clock to drive
Section 11.4
MCO