C8051F326-TB Silicon Laboratories Inc, C8051F326-TB Datasheet - Page 83

• Manufacturer Part Number: C8051F326-TB
• Description: BOARD PROTOTYPING W/C8051F326
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F326-TB

• Contents: Board
• Processor To Be Evaluated: C8051F326/F327
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F326
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bits7–6: Unused. Read = 00b. Write = don’t care.
Bits5–0: P2.[5:0]
Bits7–6: Unused. Read = 00b. Write = don’t care.
Bits5–0: Output Configuration Bit for P2.5–2.0:
Bits7–1: Unused. Read = 0000000b. Write = don’t care.
Bit0:
R/W
R/W
R/W
Bit7
Bit7
Bit7
—
—
—
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if INPUTEN = ‘0’. Otherwise, directly reads Port pin.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
0: P2.0 Output is open-drain.
1: P2.0 Output is push-pull.
P3.0
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P3MDOUT.n bit = 0).
Read - Always reads ‘0’ if INPUTEN = ‘0’. Otherwise, directly reads Port pin.
0: P3.n pin is logic low.
1: P3.n pin is logic high.
R/W
R/W
R/W
Bit6
Bit6
Bit6
—
—
—
SFR Definition 11.5. P2MDOUT: Port2 Output Mode
P2.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
—
SFR Definition 11.4. P2: Port2
SFR Definition 11.6. P3: Port3
P2.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
—
Rev. 1.1
P2.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
—
P2.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
—
P2.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
—
C8051F326/7
(bit addressable)
(bit addressable)
P2.0
P3.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
Reset Value
11111111
11111111
0xB0
0xA0
0xA6
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