EDK7145 Renesas Electronics America, EDK7145 Datasheet - Page 20

• Manufacturer Part Number: EDK7145
• Description: DEV EVALUATION KIT SH7145
• Manufacturer: Renesas Electronics America
• Type: MCUr

Specifications of EDK7145

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7145
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant

7.1.5.
HMON has initially set to connect at 115200Baud. Should the user wish to change this, the value for the BRR in
HMONserialconfiguser.c will need to be changed and the project re-built. Please refer to the HMON User Manual for further
information.
7.1.6.
HMON has an interrupt priority of 14. The serial port has an interrupt priority of 7. Modules using interrupts should be set to
lower than this value (14 or below), so that serial communications and debugging capability is maintained.
7.1.7.
For the SH/7145, HMON utilises the User Break Controller (UBC) to perform stepping of code. Breakpoints set in RAM use
TRAPA software interrupts. Breakpoints set in ROM use the UBC. Due to the nature of the UBC, the functionality has some
restrictions.
The UBC cannot be set to break on an instruction access after a non-delay branch instruction. This means that if we try and
set a breakpoint directly inside a loop body constructed from BF(BRANCH IF FALSE)/BT(BRANCH IF TRUE), the break
never occurs as the BSR will directly follow the BT/BF.
The problem is resolved by setting the data access break bit in addition to the instruction access, which causes the overrun
fetch of the next opcode to cause the break to occur after the BT/BF. This has restrictions when stepping certain other types
of constructs.
When setting a breakpoint in source code inside a loop body, execution may not stop at the expected source line. For
example setting the breakpoint at the line shown below in Figure 7-1;
and choosing Debug | Run will produce the results shown below;
As illustrated in Figure 7-2, the execution has stopped at the source line preceding the breakpoint. Examination of the
variable 'ulLed_Delay' reveals that the inner loop has only been executed once. Repeated calls to Debug | Run will
RESTRICTIONS WHEN STEPPING
B
I
NTERRUPT MASK SECTIONS
AUD
R
ATE
S
ETTING
/
RUNNING IN
F
F
IGURE
IGURE
7-1: S
7-2: R
OURCE CODE VIEW SHOWING BREAKPOINT
ROM
ESULT OF
WITH THE
D
EBUG
| R
UN TO
SH2 UBC:
B
REAKPOINT
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