AT91SAM9M10-EKES Atmel, AT91SAM9M10-EKES Datasheet - Page 58
![KIT EVAL FOR AT91SAM9M10](/photos/9/26/92643/at91sam9m10-ekes_sml.jpg)
AT91SAM9M10-EKES
Manufacturer Part Number
AT91SAM9M10-EKES
Description
KIT EVAL FOR AT91SAM9M10
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheet
1.AT91SAM9M10-EKES.pdf
(67 pages)
Specifications of AT91SAM9M10-EKES
Contents
Board, Cables, Power Supply
Processor To Be Evaluated
SAM9M10
Processor Series
SAM9M10
Interface Type
USB, UART, JTAG, SPI, TWI
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9M10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
D
C
B
A
{4}
{4}
DDR_A[0..13]
DDR_D[0..15]
8
8
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
DDR_BA0
DDR_BA1
DDR_CKE
DDR_CLK
DDR_NCLK
DDR_CS
DDR_CAS
DDR_RAS
DDR_W E
7
7
BA0
BA1
CKE
CK
NCK
CS
CAS
RAS
NW E
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
G2
G3
G8
G7
G1
H8
H3
H7
K2
K8
K3
H2
K7
F9
F2
E8
F8
F7
F3
J2
J8
J3
J7
L2
L8
L3
L7
6
6
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
ODT
CKE
CK
CK
CS
CAS
RAS
WE
RFU1
RFU2
RFU3
MT47H64M8CF-3
MT47H64M8CF-3
DDR2 SDRAM
DDR2 SDRAM
1V8
MN6
MN6
RDQS/DM
RDQS/NU
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
10uH 150mA
10uH 150mA
VDDL
VREF
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
L7
L7
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
B3
A2
A1
E9
H9
L1
E1
A9
C1
C3
C7
C9
E2
A3
E3
J1
K9
A7
B2
B8
D2
D8
E7
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_VREF
R36
R36
1R
1R
C78
C78
4.7uF
4.7uF
1V8
5
5
DDR_DQS0 {4}
DDR_DQM0 {4}
C75
C75
100nF
100nF
C55
C55
C57
C57
C59
C59
C61
C61
C63
C63
C65
C65
C67
C67
C69
C69
C71
C71
C73
C73
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
C77
C77
100nF
100nF
C79
C79
100nF
100nF
R37
R37
1.5K
1.5K
R38
R38
1.5K
1.5K
DDR_VREF
BA0
BA1
CKE
CK
NCK
CS
CAS
RAS
NW E
4
4
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_VREF {3,6}
G2
G3
G8
G7
G1
H8
H3
H7
K2
K8
K3
H2
K7
L2
L8
F9
F2
E8
F8
F7
F3
L3
L7
J2
J8
J3
J7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
ODT
CKE
CK
CK
CS
CAS
RAS
WE
RFU1
RFU2
RFU3
MT47H64M8CF-3
MT47H64M8CF-3
DDR2 SDRAM
DDR2 SDRAM
MN7
MN7
RDQS/DM
RDQS/NU
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDDL
VREF
3
3
DQS
DQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
B3
A2
A1
E9
H9
L1
E1
A9
C1
C3
C7
C9
E2
A3
E3
J1
K9
A7
B2
B8
D2
D8
E7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_VREF
1V8
DDR_DQS1 {4}
DDR_DQM1 {4}
C76
C76
100nF
100nF
AT91SAM9M10-EKES
AT91SAM9M10-EKES
AT91SAM9M10-EKES
AT91SAM9G45-EKES
AT91SAM9G45-EKES
AT91SAM9G45-EKES
EBI0_DDR2
EBI0_DDR2
EBI0_DDR2
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
C56
C56
C58
C58
C60
C60
C62
C62
C64
C64
C66
C66
C68
C68
C70
C70
C72
C72
C74
C74
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
2
2
REV
REV
REV
SCALE
SCALE
SCALE
E
E
E
D
D
D
C
C
C
B
B
B
A
A
A
INIT EDIT
INIT EDIT
INIT EDIT
MODIF.
MODIF.
MODIF.
1/1
1/1
1/1
LN
LN
LN
PP
PP
PP
PP
PP
PP
PP
PP
PP
DES.
DES.
DES.
PP
PP
PP
22-jun-09
22-jun-09
22-jun-09
02-DEC-08
02-DEC-08
02-DEC-08
03-sep-09
03-sep-09
03-sep-09
29-JUL-08
29-JUL-08
29-JUL-08
26-MAY-08
26-MAY-08
26-MAY-08
DATE
DATE
DATE
1
1
VER.
VER.
VER.
XXX
XXX
XXX
REV.
REV.
REV.
E
E
E
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
SHEET
SHEET
SHEET
DATE
DATE
DATE
5
5
5
12
12
12
D
C
B
A