R0E0200F2EMU00 Renesas Electronics America, R0E0200F2EMU00 Datasheet - Page 42

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R0E0200F2EMU00

Manufacturer Part Number
R0E0200F2EMU00
Description
EMULATOR E200F FOR SH7780 SRS
Manufacturer
Renesas Electronics America
Series
SuperH®r
Type
In-Circuit Emulatorr
Datasheet

Specifications of R0E0200F2EMU00

Contents
Emulator Board, Cables, Software and Documentation
For Use With/related Products
SH7780
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3. Low-Power States (Sleep, Software Standby, and Module Standby)
Note: The memory must not be accessed or modified in software standby state.
4. Reset Signals
Note: Do not break the user program when the _RES, _BREQ, or _WAIT signal is being low. A
5. Direct Memory Access Controller (DMAC)
6. Memory Access during User Program Execution
Table 3.2 Memory Access during User Program Execution
34
• When the emulator is used, the sleep state can be cleared with either the clearing function
• The memory must not be accessed or modified in software standby state.
• The memory must not be accessed or modified in deep standby state.
• Do not stop inputting the clock to the H-UDI module by using the module standby function.
The SH2A_custom_SoC reset signals are only valid during emulation started with clicking the
GO or STEP-type button. If these signals are enabled on the user system in command input
wait state, they are not sent to the SH2A_custom_SoC.
The DMAC operates even when the emulator is used. When a data transfer request is
generated, the DMAC executes DMA transfer.
During execution of the user program, memory is accessed by the following two methods, as
shown in table 3.2; each method offers advantages and disadvantages.
Method
H-UDI read/write
Short break
The method for accessing memory during execution of the user program is specified by using
the [Configuration] dialog box.
or with the [STOP] button, and a break will occur.
TIMEOUT error will occur. If the _BREQ or _WAIT signal is fixed to low during break,
a TIMEOUT error will occur at memory access. The signal names mean the standard
signals and may differ according to the MCU in use. In some cases, there will be no
corresponding signals.
Advantage
The stopping time of the user
program is short because memory
is accessed by the dedicated bus
master.
Cache access is enabled.
The stopping time of the user
Disadvantage
Cache access is disabled. Actual
memory is always accessed by the
H-UDI read or write.
program is long because the user
program temporarily breaks.

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