OM10074 NXP Semiconductors, OM10074 Datasheet - Page 2
![BOARD EVAL/JLINK LPC214X ARM](/photos/9/29/92927/om10074_sml.jpg)
OM10074
Manufacturer Part Number
OM10074
Description
BOARD EVAL/JLINK LPC214X ARM
Manufacturer
NXP Semiconductors
Datasheet
1.OM10071.pdf
(2 pages)
Specifications of OM10074
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-2099
www.nxp.com
choose between GoodLink
Each microcontroller is also equipped with up to two 10-bit
A/D converters and a 10-bit D/A converter.
Multiple serial communications interfaces increase design
flexibility, provide larger buffer size, and deliver higher
processing power. There are two 16C550 UARTs, two Fast
I
capabilities for buffering and variable data length).
There are two 32-bit timers (each with four capture and
compare channels), a PWM unit with six outputs, a real-time
clock, and a Watchdog timer.
For debugging, each device supports real-time emulation
and embedded trace support and has an integrated vectored
interrupt controller (VIC). Also, for compatibility with existing
tools, each device uses the standard ARM test/debug JTAG
interface.
Other features include 45 Fast I/O pins (5-V tolerant) with
switching up to 15 MHz, and an operating temperature range
of -40 to 85 °C.
Third-Party Development Tools
Through third-party suppliers, we offer a range of
development tools for our microcontrollers. For the most
current listing, please visit www.nxp.com/microcontrollers.
LPC214x selection guide
2
Type
LPC2141
LPC2142
LPC2144
LPC2146
LPC2148
C-bus (400 kbps) interfaces, and two SPI interfaces (one with
Memory
Flash (KB)
128
256
512
32
64
© 2007 NXP N.V.
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The
information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and
may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof
does not convey nor imply any license under patent- or other industrial or intellectual property rights.
SRAM (KB)
™
16
16
40
40
and SoftConnect
8
Serial interfaces
USB 2.0
(12 Mbps)
1
1
1
1
1
™
functionality.
USB
DMA
1
1
I
2
C
2
2
2
2
2
LPC214x block diagram
UART
128-bit-wide ISP/IAP Flash
2
2
2
2
2
Up to two 10-bit A/D converters
compare channels each)
Available 10-bit D/A converter
Up to 40 KB of SRAM
(up to 14 channels each)
Two 32-bit timers
Up to 512 KB of
(four capture/
SPI/SSP
(one channel)
UART0
UART1
2
2
2
2
2
real-time clock, Watchdog timer, PLL
60-MHz, 32-bit ARM7TDMI-S core
Power management, 3.3-V supply,
with AHB and APB interfaces
ADC/DAC options
ADC channels
(10-bit)
14
14
14
45 I/O ports
6
6
Date of release: January 2007
Document order number: 9397 750 15816
Printed in the USA
embedded-trace macrocell
DAC channels
(10-bit)
E-ICE/RT interface and
USB 2.0 full-speed
interrupt controller
(12 Mbps device)
(six outputs)
1
1
1
1
PWM unit
Vectored
SPI, SSP
Two I
2
C
Package
LQFP64
LQFP64
LQFP64
LQFP64
LQFP64