HSC-ADC-EVALB-DC Analog Devices Inc, HSC-ADC-EVALB-DC Datasheet - Page 5
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HSC-ADC-EVALB-DC
Manufacturer Part Number
HSC-ADC-EVALB-DC
Description
KIT EVAL ADC FIFO DUAL-CH USB HS
Manufacturer
Analog Devices Inc
Datasheet
1.HSC-ADC-EVALB-DC.pdf
(28 pages)
Specifications of HSC-ADC-EVALB-DC
Lead Free Status / Rohs Status
Not Compliant
FIFO 4.1 DATA CAPTURE BOARD FEATURES
TIMING ADJUSTMENT
OPEN SOLDER MASK
16-BIT 133MHz FIFO
16-BIT 133MHz FIFO
CLOCK LINES FOR
ON ALL DATA AND
(PARALLEL CMOS
120-CONNECTOR
IDT72V283 32k
IDT72V283 32k
EASY PROBING
JUMPERS
INPUTS)
OPTIONAL SERIAL
PORT INTERFACE
CONNECTOR
Figure 2. FIFO Components (Top View)
Rev. 0 | Page 5 of 28
WHEN ENCODE RATE
IS INTERRUPTED
RESET SWITCH
HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
µCONTROLLER CRYSTAL
CLOCK = 24MHz,
DATA CAPTURE
OFF DURING
6V SWITCHING
POWER SUPPLY
CONNECTION
ON BOARD +3.3V
REGULATOR
OPTIONAL POWER
CONNECTION
USB CONNECTION
TO COMPUTER