EVAL-ADG791GEB Analog Devices Inc, EVAL-ADG791GEB Datasheet - Page 16

• Manufacturer Part Number: EVAL-ADG791GEB
• Description: BOARD EVAL FOR ADG791
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADG791GEB

• Main Purpose: Interface, 2:1 Multiplexer
• Embedded: No
• Utilized Ic / Part: ADG791
• Primary Attributes: 4 x SPDT Analog Switch
• Secondary Attributes: 2.7 V ~ 5.5 V Supply
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADG791A/ADG791G
TERMINOLOGY
On Resistance (R
The series on-channel resistance measured between the S and
D pins.
On Resistance Match (ΔR
The channel-to-channel matching of on resistance when
channels are operated under identical conditions.
On Resistance Flatness (R
The variation of on resistance over the specified range produced
by the specified analog input voltage change with a constant
load current.
Channel Off Leakage (I
The sum of leakage currents into or out of an off channel input.
Channel On Leakage (I
The current loss/gain through an on-channel resistance,
creating a voltage offset across the device.
Input Leakage Current (I
The current flowing into a digital input when a specified low
level or high level voltage is applied to that input.
Input/Output Off Capacitance (C
The capacitance between an analog input and ground when the
switch channel is off.
Input/Output On Capacitance (C
The capacitance between the inputs or outputs and ground
when the switch channel is on.
Digital Input Capacitance (C
The capacitance between a digital input and ground.
Output On Switching Time (t
The time required for the switch channel to close. The time is
measured from 50% of the falling edge of the LDSW bit to the
time the output reaches 90% of the final value.
Output Off Switching Time (t
The time required for the switch to open. The time is measured
from 50% of the falling edge of the LDSW bit to the time the
output reaches 10% of the final value.
I
The time required for the logic value at the GPO pin to settle
after loading a GPO command. The time is measured from 50%
of the falling edge of the LDSW bit to the time the output
reaches 90% of the final value for high and 10% for low.
2
C to GPO Propagation Delay (t
ON
)
ON
OFF
IN
)
ON
FLAT(ON)
)
, I
)
INL
IN
ON
OFF
)
, I
)
)
)
H
INH
ON
OFF
, t
)
)
L
)
)
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Total Harmonic Distortion + Noise (THD + N)
The ratio of the harmonic amplitudes plus noise of a signal to
the fundamental.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
Off Isolation
The measure of unwanted signal coupling through an off switch.
Crosstalk
The measure of unwanted signal that is coupled through from
one channel to another as a result of parasitic capacitance.
Charge Injection
The measure of the glitch impulse transferred from the digital
input to the analog output during on/off switching.
Differential Gain Error
The measure of how much color saturation shift occurs when
the luminance level changes. Both attenuation and amplifica-
tion can occur; therefore, the largest amplitude change between
any two levels is specified and expressed in %.
Differential Phase Error
The measure of how much hue shift occurs when the luminance
level changes. It can be a negative or positive value and is expressed
in degrees of subcarrier phase.
Input High Voltage (V
The minimum input voltage for Logic 1.
Input Low Voltage (V
The maximum input voltage for Logic 0.
Output High Voltage (V
The minimum output voltage for Logic 1.
Output Low Voltage (V
The maximum output voltage for Logic 0.
I
Positive supply current.
DD
INL
INH
OL
)
OH
)
)
)