AN2131-DK001 Cypress Semiconductor Corp, AN2131-DK001 Datasheet - Page 80
AN2131-DK001
Manufacturer Part Number
AN2131-DK001
Description
KIT EZ-USB DEVELOPMENT BOARD
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.AN2131SC.pdf
(334 pages)
Specifications of AN2131-DK001
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1333
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As shown in Table 5-2, after enumeration, the EZ-USB core responds to the following
host requests.
To ensure proper operation of the default Keil Monitor, which uses SIO-1 (RXD1 and
TXD1), never change the following Port Config bits from “1”:
To ensure the 8051 processor can access the external SRAM (including the Keil Monitor),
do not change the following bits from “1”:
To ensure that no bits are unintentionally changed, all writes to the PORTxCFG registers
should use a read-modify-write series of instructions.
The USB Specification provides for vendor-specific requests to be sent over CONTROL
endpoint zero. The EZ-USB chip uses this feature to transfer data between the host and
EZ-USB RAM. The EZ-USB core responds to two “Firmware Load” requests, as shown
in Tables 5-3 and 5-4.
EZ-USB TRM v1.9
5.4
•
•
•
•
•
•
•
Set or clear an endpoint stall (Set/Clear Feature-Endpoint).
Read the stall status for an endpoint (Get_Status_Endpoint).
Set/Read an 8-bit configuration number (Set/Get_Configuration).
Set/Read a 2-bit interface alternate setting (Set/Get_Interface).
Download or upload 8051 RAM.
PORTBCFG bits 2 (RXD1) and 3 (TXD1).
PORTCCFG bits 6 (WR#) and 7 (RD#).
Firmware Load
Byte
0
1
2
3
4
5
6
7
bmRequest
bRequest
wValueL
wValueH
wIndexL
wIndexH
wLenghtL
wLengthH
Field
Table 5-3. Firmware Download
AddrH
AddrL
Value
Chapter 5. EZ-USB CPU
LenH
0xA0
LenL
0x40
0x00
0x00
Vendor Request, OUT
“Firmware Load”
Starting Address
Number of Bytes
Meaning
8051 Response
None required
Page 5-5
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