EZ80F910200ZCO Zilog, EZ80F910200ZCO Datasheet - Page 20

• Manufacturer Part Number: EZ80F910200ZCO
• Description: KIT DEV FOR EZ80F91 W/C-COMPILER
• Manufacturer: Zilog

Specifications of EZ80F910200ZCO

• Processor To Be Evaluated: eZ80F91
• Interface Type: Ethernet
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3154; EZ80F910200ZCO

Table 3. eZ80Acclaim!
JP1
UM014220-0508
Pin #
45
46
47
48
49
50
Notes
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
2. The Power and Ground nets are connected directly to the eZ80F91 device.
3. Additional note: external capacitive loads on RD, WR, IORQ, MREQ, D0–D7 and A0–A23
this table. The entire interface is represented in the eZ80F91 Module Schematics, see
through
should be below 10 pF to satisfy the timing requirements for the eZ80 ® CPU. All unused inputs
should be pulled to either V DD or GND, depending on their inactive levels to reduce power con-
sumption and to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deacti-
vated via software in the eZ80F91’s Peripheral Power-Down Register.
1,3
(Continued)
Figure
Symbol
GND
RD
WR
INSTRD
BUSACK
BUSREQ
I/O Connector
Figure 7
located at position JP2 on the eZ80Acclaim!
on page 17 identifies the pins and their functions.
25.
®
displays the pin layout of the I/O Connector in the 50-pin header,
Signal Direction
Development Kit Peripheral Bus Connector Identification—
Bidirectional
Bidirectional
Output
Input
Input
Pull-Up 10 k
Pull-Up 10 k
Active Level
Low
Low
Low
Ω
Ω
; Low
; Low
eZ80F91 Development Kit
®
Development Kit.
eZ80F91 Signal
eZ80 Development Kit
User Manual
Yes
Yes
Yes
Yes
Yes
Figure 23
Table 4
2
15