EZ80F910200ZCO Zilog, EZ80F910200ZCO Datasheet - Page 37

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EZ80F910200ZCO

Manufacturer Part Number
EZ80F910200ZCO
Description
KIT DEV FOR EZ80F91 W/C-COMPILER
Manufacturer
Zilog
Datasheet

Specifications of EZ80F910200ZCO

Processor To Be Evaluated
eZ80F91
Interface Type
Ethernet
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3154
EZ80F910200ZCO
UM014220-0508
Table 15. Bit Access to the LED Cathode, Modem, and Triggers
Bits 0–6 in
their corresponding cathode bits, bits 0–4 in
to illuminate each of the LED’s, respectively.
If bit 7 in the GPIO Output Control Register is 1, all of the GPIO lines are
configured as inputs. If this bit is 0, all of the GPIO lines are configured as
outputs.
Table 15
modem, and triggers. This table shows the bit configuration for each cath-
ode bit. Bits 5, 6, and 7 do not carry any significance within the LED
matrix. These three bits are control bits for the modem reset, Trig1, and
Trig2 functions, respectively.
An LED display sample program is shipped with the eZ80F91 Develop-
ment Kit. Refer to eZ80Acclaim!
(QS0020) or to the Tutorial section in the Zilog Developer Studio II—
eZ80Acclaim!
Function
Cathode Row 5
Cathode Row 4
Cathode Row 3
Cathode Row 2
Cathode Row 1
Modem RST
Trig 1
Trig 2
indicates the multiple register functions of the LED cathode,
Table 9
®
User Manual (UM0144).
X
7
are LED anode bits. They must be set High (1) and
X
6
X
5
®
X
4
Development Kits Quick Start Guide
Bit #
X
3
eZ80F91 Development Kit
Table
X
2
X
1
15, must be set Low (0)
eZ80 Development Kit
X
0
User Manual
32

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