C8051F015DK-J Silicon Laboratories Inc, C8051F015DK-J Datasheet - Page 13
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C8051F015DK-J
Manufacturer Part Number
C8051F015DK-J
Description
DEV KIT F015/F016/F017/F018/F019
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F005-TB.pdf
(171 pages)
Specifications of C8051F015DK-J
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 13 of 171
- Download datasheet (2Mb)
1.1.3.
The C8051F000 MCU family has several key enhancements both inside and outside the CIP-51 core to improve its
overall performance and ease of use in the end applications.
The extended interrupt handler provides 21 interrupt sources into the CIP-51 (as opposed to 7 for the standard
8051), allowing the numerous analog and digital peripherals to interrupt the controller. An interrupt driven system
requires less intervention by the MCU, giving it more effective throughput. The extra interrupt sources are very
useful when building multi-tasking, real-time systems.
There are up to seven reset sources for the MCU: an on-board VDD monitor, a Watchdog Timer, a missing clock
detector, a voltage level detection from Comparator 0, a forced software reset, the CNVSTR pin, and the /RST pin.
The /RST pin is bi-directional, accommodating an external reset, or allowing the internally generated POR to be
output on the /RST pin. Each reset source except for the VDD monitor and Reset Input Pin may be disabled by the
user in software. The WDT may be permanently enabled in software after a power-on reset during MCU
initialization.
The MCU has an internal, stand alone clock generator which is used by default as the system clock after any reset.
If desired, the clock source may be switched on the fly to the external oscillator, which can use a crystal, ceramic
resonator, capacitor, RC, or external clock source to generate the system clock. This can be extremely useful in low
power applications, allowing the MCU to run from a slow (power saving) external crystal source, while periodically
switching to the fast (up to 16MHz) internal oscillator as needed.
13
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Additional Features
(Port
XTAL1
XTAL2
I/O)
CP0+
CP0-
Generator
Internal
Figure 1.5. On-Board Clock and Reset
Clock
Crossbar
OSC
Comparator 0
CNVSTR
(CNVSTR
+
-
enable)
reset
enable)
(CP0
reset
Clock Select
System
Clock
Detector
Missing
Clock
(one-
shot)
Microcontroller
EN
Rev. 1.7
Extended Interrupt
CIP-51
VDD
Core
Handler
EN
WDT
PRE
Supply
Monitor
+
-
Software Reset
System Reset
Timeout
Supply
Reset
(wired-OR)
Reset
Funnel
/RST
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