C8051F015DK-J Silicon Laboratories Inc, C8051F015DK-J Datasheet - Page 60
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C8051F015DK-J
Manufacturer Part Number
C8051F015DK-J
Description
DEV KIT F015/F016/F017/F018/F019
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F005-TB.pdf
(171 pages)
Specifications of C8051F015DK-J
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 60 of 171
- Download datasheet (2Mb)
9. VOLTAGE REFERENCE
The voltage reference circuit consists of a 1.2V, 15ppm/C (typical) bandgap voltage reference generator and a
gain-of-two output buffer amplifier. The reference voltage on VREF can be connected to external devices in the
system, as long as the maximum load seen by the VREF pin is less than 200A to AGND (see Figure 9.1).
If a different reference voltage is required, an external reference can be connected to the VREF pin and the internal
bandgap and buffer amplifier disabled in software. The external reference voltage must still be less than AV+ -
0.3V. The Reference Control Register, REF0CN (defined in Figure 9.2), provides the means to enable or disable
the bandgap and buffer amplifier. The BIASE bit in REF0CN enables the bias circuitry for the ADC and DACs
while the REFBE bit enables the bandgap reference and buffer amplifier which drive the VREF pin. When
disabled, the supply current drawn by the bandgap and buffer amplifier falls to less than 1uA (typical) and the
output of the buffer amplifier enters a high impedance state. If the internal bandgap is used as the reference voltage
generator, BIASE and REFBE must both be set to 1. If an external reference is used, REFBE must be set to 0 and
BIASE must be set to 1. If neither the ADC nor the DAC are being used, both of these bits can be set to 0 to
conserve power. The electrical specifications for the Voltage Reference are given in Table 9.1.
The temperature sensor connects to the highest order input of the A/D converter’s input multiplexer (see Figure 5.1
and Figure 5.5 for details). The TEMPE bit within REF0CN enables and disables the temperature sensor. While
disabled, the temperature sensor defaults to a high impedance state and any A/D measurements performed on the
sensor while disabled result in meaningless data.
External Equivalent
Load Circuit
AGND
AGND
AV+
RLOAD
R1
Figure 9.1. Voltage Reference Functional Block Diagram
Reference
External
Voltage
Circuit
VREF
TEMPE
REFBE
BIASE
Rev. 1.7
EN
EN
Reference
Generator
2.4V
Bias
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
EN
AGND
AGND
Sensor
Temp
(to Analog Mux)
(Bias to ADC
and DAC)
(to ADC
and DAC)
60
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