HS3048BTCI01H Renesas Electronics America, HS3048BTCI01H Datasheet - Page 130

• Manufacturer Part Number: HS3048BTCI01H
• Description: ON CHIP DEBUG EMULATOR
• Manufacturer: Renesas Electronics America

Specifications of HS3048BTCI01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 5.5 BREAKCONDITION_SET Command Parameters
Parameter
<address>
<addrcycle>
<addr_mask>
<data>
<size>
<r/w>
<channel_number>
Note: The parameters for this command vary with the product. For the specifications of
104
each product, refer to the on-line help.
Type
Numerical value,
character string
Keyword
Keyword
Numerical value
Keyword
Keyword
Numerical value
Description
Numerical value or symbol representing an address
bus value
Address bus access conditions
pcafter: The address bus is targeted during program
fetch cycles. Breaks after the instruction at the
address set by the <address> parameter is executed.
When <addrcycle> is omitted, the address in the
program fetch cycles, and the address bus during data
access cycles are targeted.
Sets mask conditions for the address bus. The
masked bits satisfy the condition regardless of the
address values.
Set either of the following:
m1: The lower 4 bits are masked.
m2: The lower 8 bits are masked.
m3: The lower 12 bits are masked.
m4: The lower 16 bits are masked.
m5: The lower 20 bits are masked.
Data bus value
Sets the access conditions of the data bus.
Set either of the following:
lbyte: Lower 8-bit byte access
hbyte: Upper 8-bit byte access
word: Word access
Read/write conditions
Set either of the following keywords:
read: read cycles
write: write cycles
Hardware break condition channel number
Specifiable options change depending on the channel
number. For details, refer to section 6.4.2, Hardware
Break Functions.
1: <addropt>, <dataopt>, and <r/wopt> can be set.
2: address <address> pcafter