HS7705KCI02H Renesas Electronics America, HS7705KCI02H Datasheet - Page 231

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HS7705KCI02H

Manufacturer Part Number
HS7705KCI02H
Description
ON CHIP DEBUG EMULATOR W/TRACE
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7705KCI02H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Note: When the [L-bus] or [I-bus] radio button is selected, the following bus cycles will be
traced.
the cache has been hit.
acquired when the cache has been hit. The address information acquired by the I-bus is 28
bits and the upper 4 bits are displayed as ‘*’. The source cannot be displayed in the
[Trace] window. When a cache fill cycle is acquired, I-bus must be selected.
L-bus: A bus cycle generated by the CPU is acquired. A bus cycle is also acquired when
I-bus: A bus cycle generated by the CPU or DMA is acquired. A bus cycle is not
Figure 6.12 [Window trace] Page
205

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