HS7727KCM02H Renesas Electronics America, HS7727KCM02H Datasheet - Page 21

• Manufacturer Part Number: HS7727KCM02H
• Description: ON CHIP DEBUG EMULATOR W/TRACE
• Manufacturer: Renesas Electronics America

Specifications of HS7727KCM02H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 2.3 Watchdog Timer Register
Register Name
WTCSR(W)
WTCNT(W)
WTCSR(R)
WTCNT(R)
15. Illegal Instructions
16. Interrupt
If illegal instructions are executed by STEP-type commands, the emulator cannot go to the
next program counter.
When the BLMSK bit in the ICR1 register is 1, the NMI interrupt is accepted during break and
the program is executed from the NMI interrupt vector. If the program cannot return normally
from the NMI interrupt routine or the value in the general-purpose register is not guaranteed, a
communication timeout error will occur.
The watchdog timer operates only when the user program is executed. Do not change the
value of the frequency change register in the [IO] window or [Memory] window.
The internal I/O registers can be accessed from the [IO] window. However, note the
following when accessing the SDMR register of the bus-state controller. Before accessing
the SDMR register, specify addresses to be accessed in the I/O-register definition file
(SH7727.IO) and then activate the HEW. After the I/O-register definition file is created,
the MPU’s specification may be changed. If each I/O register in the I/O-register definition
file differs from addresses described in the hardware manual, change the I/O-register
definition file according to the description in the hardware manual. The I/O-register
definition file can be customized depending on its format. Note that, however, the E10A
emulator does not support the bit-field function.
Verify
In the [IO] window, the verify function of the input value is disabled.
Usage
Write
Write
Read
Read
Register
Watchdog timer control/status register
Watchdog timer counter
Watchdog timer control/status register
Watchdog timer counter
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