SI5318-EVB Silicon Laboratories Inc, SI5318-EVB Datasheet - Page 24

• Manufacturer Part Number: SI5318-EVB
• Description: BOARD EVALUATION FOR SI5318
• Manufacturer: Silicon Laboratories Inc
• Type: Precision Clockr

Specifications of SI5318-EVB

• Contents: Fully Assembled Evaluation Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SI5318
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1179

Si5318
24
*Note: The LVTLL inputs on the Si5318 device have an internal pulldown mechanism that causes these inputs to default to a
A2, A3, B2,
B3, B6, B7,
Pin #
H6
H7
H5
H8
C1
H4
C8
B1
E8
logic low state if the input is not driven from an external source.
RSVD_GND
FRQSEL[0]
FRQSEL[1]
CAL_ACTV
CLKOUT+
CLKOUT–
BWSEL[0]
BWSEL[1]
Pin Name
VALTIME
Table 10. Si5318 Pin Descriptions (Continued)
I/O
—
O
O
I*
I*
I*
Signal Level
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
CML
Rev. 1.0
Differential Clock Output.
High frequency clock output. The frequency of the
CLKOUT output is a multiple of the frequency of the
CLKIN input. The input-to-output frequency multipli-
cation factor is set by selecting the clock input range
and the clock output range. The frequency of the
CLKOUT clock output can be in the 19 or 155 MHz
range as indicated in Table 3 on page 7. The clock
output frequency is selected using the FRQSEL[1:0]
pins. The clock input frequency is selected using the
INFRQSEL[2:0] pins.
Clock Output Frequency Range Select
Select frequency range of the clock output, CLKOUT.
(See Table 3 on page 7.)
00 = Clock Driver Powerdown.
01 = 19 MHz Frequency Range.
10 = 155 MHz Frequency Range.
11 = Reserved.
Bandwidth Select.
BWSEL[1:0] pins set the bandwidth of the loop filter
within the DSPLL to 6400, 3200, 1600, or 800 Hz as
indicated below.
00 = 3200 Hz
01 = 1600 Hz
10 = 800 Hz
11 = 6400 Hz
Note: The loop filter bandwidth will be twice the value
Calibration Mode Active.
This output is driven high during the DSPLL self-cali-
bration and the subsequent initial lock acquisition
period.
Clock Validation Time for LOS.
VALTIME sets the clock validation times for recovery
from an LOS alarm condition. When VALTIME is
high, the validation time is approximately
13 seconds. When VALTIME is low, the validation
time is approximately 100 ms.
Reserved—GND.
This pin must be tied to GND for normal operation.
indicated when DBLBW is set high.
Description