ISL6521EVAL1 Intersil, ISL6521EVAL1 Datasheet

ISL6521EVAL1

Manufacturer Part Number

ISL6521EVAL1

Description

EVALUATION BOARD 1 ISL6521

Manufacturer

Intersil

Datasheets

1.ISL6521CBZ.pdf (13 pages)

2.ISL6521EVAL1Z.pdf (8 pages)

Specifications of ISL6521EVAL1

Main Purpose

DC/DC, Step Down with LDO

Outputs And Type

4, Non-Isolated

Power - Output

13.5W

Voltage - Output

1.5V, 2.5V, 3.3V, 1.8V

Current - Output

5A, 1A, 1A, 120mA

Voltage - Input

4.5 ~ 5.5V

Regulator Topology

Buck

Frequency - Switching

300kHz

Board Type

Fully Populated

Utilized Ic / Part

ISL6521

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Current page: 1 of 8
Download datasheet (565Kb)

Introduction

Field Programmable Gate Arrays (FPGAs) are providing a

path for rapid prototyping and implementation of digital

systems. The classes of programmable logic devices vary

based on memory utilization and configuration. Power

management systems designed to support them must

stand-up to potential programming enhancements which

boost their power requirements. Responding to the changing

needs of the industry, Intersil introduces the ISL6521

controller to power mixed-voltage FPGAs.

The versatility of the ISL6521 lends well to powering most

any embedded processor or logic device which require a

regulated high current, low voltage supply and up to three

independent, lower current supplies.

Intersil ISL6521

The ISL6521 regulates four output voltages and provides

simple protection functions. The PWM controller drives two

external N-Channel MOSFETs in a synchronous buck

converter topology. This output is intended to power the

internal core logic (V

can drive up to 120mA directly, or up to 3A with an external

NPN pass transistor. The linear controllers typically power

the I/O bank (V

and the auxiliary logic (V

block diagram for an FPGA is shown in Figure 1. Integrated

high-bandwidth error amplifiers and an accurate internal

voltage reference insure a ±2% static voltage regulation

tolerance over line, load and temperature ranges.

FIGURE 1. FPGA POWER MANAGEMENT BLOCK DIAGRAM

PWM

Controller

ISL6521

Linear

CCO

), input buffer reference voltage (V

CCINT

CCAUX

). The integrated linear controllers

CCAUX

CCINT

CCO

REF

). The power management

Power Management Controller For Mixed-Voltage

Application Note

Core Logic

Aux Logic

Buffer

Reference

I/O Logic

FPGA

REF

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

The ISL6521 features overcurrent protection of the switching

converter and simple undervoltage protection of the linear

controllers. For a more detailed description of the ISL6521

functionality, refer to the ISL6521 Data Sheet [1].

The ISL6521EVAL1 Reference Design

The ISL6521EVAL1 evaluation board is intended to provide

a versatile platform for evaluation of surface mount and thru

hole components. The evaluation board is designed to meet

the output voltage and current specifications shown in

Table 1. The synchronous buck converter can sustain 5A of

continuous load current and handle 5A step, 2.5A/µs load

current transients. Two linear regulators are designed to

supply 1A of continuous load current with the third linear

regulator providing 100mA with no external pass device. The

board is implemented on a 1-ounce, 2-layer, printed circuit

board. See pages 5-8 for schematic, bill of materials, and

layout plots.

Quick Start Evaluation

Circuit Setup

Connect a +5V bench top power supply to the +5V and GND

turrets located next to the Intersil logo, see Figure 2. Each

output has a similar pair of turrets labeled VOUTx and GND.

Each output can be exercised using either resistive or

electronic loads connected across these points. Once the

external supply and loads are connected to the board, the

+5V supply can be energized. A light emitting diode, D2,

should burn red to indicate power has been applied to the

board. If D2 is not red, power-down the supply and check all

external connections.

Buck Regulator:

Static Regulation VOUT1

Continuous Load Current

Load-Current Transient

Linear Regulators:

Static Regulation VOUT2

Continuous Load Current

Static Regulation VOUT3

Continuous Load Current

Static Regulation VOUT4

Continuous Load Current

TABLE 1. ISL6521EVAL1 DESIGN PARAMETERS

All other trademarks mentioned are the property of their respective owners.

PARAMETER

July 10, 2006

Intersil (and design) is a registered trademark of Intersil Americas Inc.

FPGA Based Systems

Author: Ross O. Staffhorst

2.5A/µs

1.530V

3.366V

2.550V

1.836V

120mA

MAX

AN1247.0

100mA

1.470V

3.234V

2.450V

1.764V

MIN

Related parts for ISL6521EVAL1

ISL6521EVAL1 Summary of contents

Page 1

... For a more detailed description of the ISL6521 functionality, refer to the ISL6521 Data Sheet [1]. The ISL6521EVAL1 Reference Design The ISL6521EVAL1 evaluation board is intended to provide a versatile platform for evaluation of surface mount and thru hole components. The evaluation board is designed to meet the output voltage and current specifications shown in Table 1. The synchronous buck converter can sustain 5A of continuous load current and handle 5A step, 2.5A/µ ...

Page 2

... Power Supply Indicator FIGURE 2. EXTERNAL POWER SUPPLY AND LOAD CONNECTIONS ISL6521EVAL1 Performance Enabling the Controller Once the bias voltage applied to the PWM controller reaches the rising Power-On Reset (POR) threshold, the ISL6521 initiates a soft-start interval. The point at which the ISL6521 reaches the rising POR threshold is indicated as Soft-start Begins in Figure 3 ...

Page 3

... Shutdown on any one output does not shutdown all outputs. Transient Response FPGA transient specifications vary depending on overall gate usage. The ISL6521EVAL1 is designed to meet a load step of 5A with a slew rate of 2.5A/µs. During a transient, the FPGA core voltage (VOUT1) must not exceed ±50mV of +1 ...

Page 4

... Two linear controllers can be ganged together to create one 240mA regulator or all three linears can be tied together to source 360mA. The ISL6521EVAL1 evaluation platform supports evaluation of this option. First, the external pass devices, Q2 and Q3, must be removed. ...

Page 5

Schematic ...

Page 6

... Resistor, 5.9kΩ, 1%, 1/10W Resistor, 9.09kΩ, 1%, 1/10W Resistor, 7.15kΩ, 1%, 1/10W Resistor, 2.43kΩ, 1%, 1/10W Resistor, 37.4Ω, 1%, 1/10W DNP Resistors, combine linears into one supply Large Test Point PACKAGE VENDOR QTY SO-8 Intersil 1 0603 Panasonic 1 0603 Panasonic 1 0603 Panasonic 1 ...

Page 7

... ISL6521EVAL1 Layout 7 Application Note 1247 TOP SILK SCREEN TOP ASSEMBLY AN1247.0 July 10, 2006 ...

Page 8

... ISL6521EVAL1 Layout (Continued) Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

Related keywords

isl6558
isl6527
isl6521
ISL6521EVAL1 datasheet
ISL6521EVAL1 data sheet
ISL6521EVAL1 pdf datasheet
ISL6521EVAL1 component
ISL6521EVAL1 part
ISL6521EVAL1 distributor
ISL6521EVAL1 RoHS
ISL6521EVAL1 datasheet download