DS21448LDK Maxim Integrated Products, DS21448LDK Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
DS21448LDK
Manufacturer Part Number
DS21448LDK
Description
KIT DESIGN LIU DS21448L T1/J1/E1
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21448L.pdf
(60 pages)
Specifications of DS21448LDK
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 36 of 60
- Download datasheet (832Kb)
TRANSMIT LINE
RECEIVE LINE
Figure 7-1. Basic Interface
NOTE 1: ALL RESISTOR VALUES ARE ±1%.
NOTE 2: IN E1 APPLICATIONS, THE R
NOTE 3: THE RR RESISTORS SHOULD EACH BE SET TO 60Ω IF THE INTERNAL RECEIVE-SIDE TERMINATION FEATURE IS ENABLED. WHEN THIS
NOTE 4: SEE
(Table
FEATURE IS DISABLED, R
Table 7-A
7-A). NO RETURN LOSS IS REQUIRED FOR T1 APPLICATIONS.
AND
TOWARD THE NETWORK)
Table 7-B
(LARGER WINDING
R
= 37.5Ω FOR 75Ω OR 60Ω FOR 120Ω E1 SYSTEMS, OR 50Ω FOR 100Ω T1 LINES.
T
FOR THE APPROPRIATE TRANSMIT TRANSFORMER TURNS RATIO (N).
2:1
1:1
RESISTORS ARE USED TO INCREASE THE TRANSMITTER RETURN LOSS
R
r
R
R
t
t
(NONPOLARIZED)
R
0.1µF
r
1.0µF
36 of 60
RTIP
TTIP
RRING
TRING
Semiconductor
DS21448
Dallas
DS21448 3.3V T1/E1/J1 Quad Line Interface
MCLK
V
V
V
V
DD
DD
SS
SS
0.01µF
(THIS CAN ALSO BE 1.544MHz
FOR T1 ONLY OPERATION)
0.1µF
0.1µF
2.048MHz
0.01µF
V
10µF
DD
+
68µF
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