HW-SPAR3-SK-UNI-G Xilinx Inc, HW-SPAR3-SK-UNI-G Datasheet - Page 49

• Manufacturer Part Number: HW-SPAR3-SK-UNI-G
• Description: KIT STARTER SPARTAN-3
• Manufacturer: Xilinx Inc
• Series: Spartan-3r
• Type: FPGA Configurationr

Specifications of HW-SPAR3-SK-UNI-G

• Contents: Board, Cable, Software, Datasheets and User Manual
• For Use With/related Products: Spartan-3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1521

Expansion Connectors
Table 13-2: Pinout for A1 Expansion Connector
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
Schematic Name
V
MA1-WAIT
MA1-DSTB
TDO-ROM
CCO
MA1-DB1
MA1-DB3
MA1-DB5
MA1-DB7
MA1-INT
LSBCLK
GND
TMS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A1 Connector Pinout
(+3.3V)
The A1 expansion connector is located along the top edge of the board, on the left, as
indicated by
FPGA connections are specified in parentheses.
FPGA JTAG TMS
V
SRAM IC10 IO0
SRAM IC10 IO1
SRAM IC10 IO2
SRAM IC10 IO3
SRAM IC10 IO4
SRAM IC10 IO5
SRAM IC10 IO6
SRAM IC10 IO7
Platform Flash
CCO
SRAM A10
SRAM A12
SRAM A14
SRAM A16
SRAM A17
JTAG TDO
FPGA Pin
SRAM A6
SRAM A8
(C13)
(M7)
(N7)
(G5)
(H4)
(all banks)
(R6)
(R5)
(C2)
(C1)
(K5)
(T8)
(T5)
(B1)
(F3)
(E3)
(L3)
(J3)
21
in
Figure
www.xilinx.com
1-2.
Connector
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
Table 13-2
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
provides the pinout for the A1 connector. The
FPGA DOUT/BUSY
FPGA JTAG TCK
Header J7, pin 3
JTAG Isolation
SRAM WE#
SRAM OE#
SRAM A11
SRAM A13
SRAM A15
FPGA Pin
SRAM A0
SRAM A1
SRAM A2
SRAM A3
SRAM A4
SRAM A5
SRAM A7
SRAM A9
(M10)
(C14)
(M4)
(M3)
(N8)
(N3)
(G3)
(G4)
(H3)
(K4)
(K3)
(L5)
(L4)
(P9)
(F4)
(E4)
(J4)
Schematic Name
JTAG Isolation
MA1-WRITE
MA1-RESET
MA1-ASTB
MA1-DB0
MA1-DB2
MA1-DB4
MA1-DB6
VU (+5V)
TDO-A
ADR0
ADR1
ADR2
ADR3
ADR4
ADR5
TCK
CSA
WE
OE
49
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