ICL8052CPD Intersil, ICL8052CPD Datasheet - Page 14

• Manufacturer Part Number: ICL8052CPD
• Description: IC CONV A/D 16/14/12-BIT 14DIP
• Manufacturer: Intersil

Specifications of ICL8052CPD

• Rohs Status: RoHS non-compliant
• Other names: NT5016

Component Value Selection
For optimum performance of the analog section, care must
be taken in the selection of values for the integrator capacitor
and resistor, auto-zero capacitor, reference voltage, and
conversion rate. These values must be chosen to suit the
particular application.
Integrating Resistor
The integrating resistor is determined by the full scale input
voltage and the output current of the buffer used to charge
the integrator capacitor. This current should be small
compared to the output short circuit current such that
thermal effects are kept to a minimum and linearity is not
affected. Values of 5 to 40 A give good results with a
nominal of 20 A. The exact value may be chosen by:
NOTE: If gain is used in the buffer amplifier then
Integrating Capacitor
The product of integrating resistor and capacitor is selected
to give 9 volt swing for full scale inputs. This is a compromise
between possibly saturating the integrator (at +14 volts) due
to tolerance build-up between the resistor, capacitor and
clock and the errors a lower voltage swing could induce due
to offsets referred to the output of the comparator. In
general, the value of C
A very important characteristic of the integrating capacitor is
that it have low dielectric absorption to prevent roll-over or
INTERNAL CLOCK
R
C
INTERNAL LATCH
STATUS OUTPUT
INT
INT
INTEGRATOR
=
=
R
full scale voltage (see note)
------------------------------------------------------------------------ -
--------------------------------------------------------------------------------------------------------- -
INT
OUTPUT
(32768 for - 16)
(8192 for -14)
Integrator Output Voltage Swing
=
--------------------------------------------------------------------------------------- -
Buffe rGain (full scale voltage)
20 A
NUMBER OF COUNTS TO ZERO CROSSING
INT
AZ PHASE I
20 A clock period
is given by:
20 A
-16
-14
PROPORTIONAL TO V
ICL8052/ICL7104, ICL8068/ICL7104
DETECTED
FIGURE 8. CONVERSION TIMING
POLARITY
INT PHASE II
PHASE I
32768
8192
IN
COUNTS
5-19
ratiometric errors. A good test for dielectric absorption is to
use the capacitor with the input tied to the reference.
This ratiometric condition should read half scale (100...000)
and any deviation is probably due to dielectric absorption.
Polypropylene capacitors give undetectable errors at reason-
able cost. Polystyrene and polycarbonate capacitors may
also be used in less critical applications.
Auto-Zero and Reference Capacitor
The size of the auto-zero capacitor has some influence on
the noise of the system, a large capacitor giving less noise.
The reference capacitor should be large enough such that
stray capacitance to ground from its nodes is negligible.
NOTE: When gain is used in the buffer amplifier the reference
capacitor should be substantially larger than the auto-zero capacitor.
As a rule of thumb, the reference capacitor should be approximately
the gain times the value of the auto-zero capacitor. The dielectric
absorption of the reference cap and auto-zero cap are only important
at power-on or when the circuit is recovering from an overload. Thus,
smaller or cheaper caps can be used here if accurate readings are
not required for the first few seconds of recovery.
Reference Voltage
The analog input required to generate a full scale output is
V
The stability of the reference voltage is a major factor in the
overall absolute accuracy of the converter. The resolution of
the ICL7104 at 16 bits is one part in 65536, or 15.26ppm.
Thus, if the reference has a temperature coefficient of
50ppm/C (on board reference) a temperature change of
1/3C will introduce a one-bit absolute error. For this reason,
it is recommended that an external high quality reference be
used where the ambient temperature is not controlled or
where high-accuracy absolute measurements are being
made.
IN
PHASE II
= 2V
32768
8192
REF
.
ZERO CROSSING
OCCURS
DEINT PHASE III
ZERO CROSSING
DETECTED
AFTER ZERO CROSSING,
ANALOG SECTION WILL
BE IN AUTOZERO
CONFIGURATION
PHASE III
65536
16384
AZ