HCPL-316 ETC, HCPL-316 Datasheet
HCPL-316
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HCPL-316 Summary of contents
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... BOUNDARY BOUNDARY HCPL - 316J HCPL - 316J HCPL - 316J HCPL - 316J ISOLATION ISOLATION BOUNDARY BOUNDARY FAULT MICRO-CONTROLLER HCPL-316J • Wide Operating V Range Volts • - +100 C Operating Temperature Range • 15 kV/ s Min. Common Mode Rejection (CMR 1500 V CM • Regulatory Approvals: UL, ...
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... HCPL-316J will be the primary source of IGBT protection. UVLO is needed to ensure DESAT is functional. Once V > 11.6 UVLO+ V, DESAT will remain functional until V < 12.4 V. Thus, the UVLO- DESAT detection and UVLO features of the HCPL-316J work in conjunction to ensure constant IGBT protection. Pin 6 Detected on (FAULT) V OUT Pin 14 Output X ...
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... Product Overview Description The HCPL-316J is a highly integrated power control device that incorporates all the necessary components for a complete, isolated IGBT gate drive circuit with fault protection and feedback into one SO-16 package. TTL input logic levels allow direct interface with a microcontroller, and an optically ...
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... V. FAULT output remains low until RESET is brought low. FAULT output is an open collector which allows the FAULT outputs from all HCPL-316Js in a circuit to be connected together in a “wired OR” forming a single fault bus for interfacing directly to the micro-controller. ...
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... Surface Mount dimensions in: inches (millimeters) NOTE: INITIAL AND CONTINUED VARIATION IN THE COLOR OF THE HCPL-316J’s WHITE MOLD COMPOUND IS NORMAL AND DOES NOT AFFECT DEVICE PERFORMANCE OR RELIABILITY. Package Characteristics All specifications and figures are at the nominal (typical) operating conditions ...
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... Regulatory Information The HCPL-316J is pending approval by the following organizations: VDE Approved under VDE0884/06.92 with V = 891 Vpeak. IORM VDE 0884 Insulation Characteristics* Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 150 Vrms for rated mains voltage 300 Vrms ...
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Insulation and Safety Related Specifications Parameter Symbol Value Units Minimum External Air Gap L(101) (Clearance) Minimum External L(102) Tracking (Creepage) Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance CTI (Comparative Tracking Index) Isolation Group Absolute Maximum Ratings Parameter Storage Temperature ...
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Electrical Specifications (DC) Unless otherwise noted, all typical values at T all Minimum/Maximum specifications are at Recommended Operating Conditions. Parameter Symbol Logic Low Input IN+L IN-L Voltages V RESETL Logic High Input IN+H IN-H ...
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Switching Specifications (AC) Unless otherwise noted, all typical values at T all Minimum/Maximum specifications are at Recommended Operating Conditions. Parameter Symbol V to High Level Output IN Propagation Delay Time V to Low Level Output IN Propagation Delay Time Pulse ...
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... HCPL-316J is OUT allowed to go high ( > CC2 the DESAT detection feature UVLO of the HCPL-316J will be the primary source of IGBT protection. UVLO is needed to ensure DESAT is functional. Once V > 11.6 V, UVLO+ DESAT will remain functional until V < 12.4 V. Thus, the DESAT UVLO- detection and UVLO features of the HCPL-316J work in conjunction to ensure constant IGBT protection ...
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Performance Plots 2.0 1.8 1.6 1.4 1.2 1.0 -40 - 100 T – TEMPERATURE – °C A Figure 3. I vs. Temperature -650 µA OUT I = -100 mA OUT -1 ...
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I CC2H I CC2L 2.40 2. – OUTPUT SUPPLY VOLTAGE – V CC2 Figure 12 CC2 CC2 -40°C +25°C 1 +100° 0.5 ...
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PLH t PHL 0.35 0.30 0.25 0. 100 LOAD CAPACITANCE – nF Figure 21. Propagation Delay vs. Load Capacitance. 3 CC2 CC2 2.5 2.0 1.5 ...
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Test Circuit Diagrams V IN+ 0.1 µ IN- LED2+ 4.5 V – V DESAT CC1 GND1 V CC2 – 0 RESET FAULT V OUT I FAULT V V LED1 LED1- Figure 30. I ...
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V IN+ 0.1 µ IN- LED2 – V DESAT CC1 GND1 V RESET FAULT V V LED1+ V LED1- Figure 36. V Test Circuit IN+ 0.1 V IN- µF 5 – ...
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– IN- LED2 DSCHG V DESAT CC1 GND1 V CC2 RESET V C FAULT V OUT 0.1 µ LED1 LED1- EE Figure 42. I Test ...
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V IN+ 0.1 µ IN- – DESAT CC1 GND1 V HIGH LOW RESET V FAULT FAULT V LED1+ V LED1- Figure 48. t Test Circuit. RESET(FAULT IN+ 2 ...
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IN- V 2.5 V 2 OUT t t PLH PHL Figure 54. V Propagation Delay Waveforms, OUT Noninverting Configuration. t DESAT (FAULT) t DESAT (10%) t DESAT (LOW ...
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V V IN+ E 0.1 + µ IN- LED2+ – V DESAT CC1 GND1 V CC2 RESET V C FAULT V OUT V V LED1 LED1- EE Figure 57. I Test Circuit. CH ...
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... The fault detection method, which is adopted in the HCPL-316J monitor the saturation (collector) voltage of the IGBT and to trigger a local fault shutdown sequence if the collector voltage exceeds a predetermined threshold. A small ...
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... Figure 63 below illustrates input and output waveforms under the conditions of normal operation, a desat fault condition, and normal reset behavior. Normal Operation During normal operation OUT the HCPL-316J is controlled by either with the IGBT IN+ IN- collector-to-emitter voltage being monitored through D . The ...
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... Under Voltage Lockout The HCPL-316J Under Voltage Lockout (UVLO) feature is designed to prevent the application of insufficient gate voltage to the IGBT by forcing the HCPL-316J output low during power-up. IGBTs typically require gate voltages achieve their rated V voltage. At CE(ON) gate voltages below 13 V ...
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... Behavioral Circuit Schematic The functional behavior of the HCPL-316J is represented by the logic diagram in Figure 64 which fully describes the interaction and sequence of internal and external signals in the HCPL-316J. Input IC In the normal switching mode, no output fault has been detected, and the low state of the fault latch allows the input signals to control the signal LED ...
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... Rapid common mode transients can affect the fault pin voltage while the fault output is in the high state. A 330 pF capacitor (Fig. 66) should be connected between the fault pin and ground to achieve adequate CMOS noise margins at the specified CMR 24 HCPL-316J ...
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... GND1 5 RESET 6 FAULT 7 V LED1 LED1- Figure 68. Typical Input Configuration, Non-Inverting. Driving Input pf HCPL-316J in Non-Inverting/Inverting Mode The Gate Drive Voltage Output of the HCPL-316J can be configured as inverting or non-inverting using the V and IN– V inputs. As shown in Figure IN+ 68, when a non-inverting + µC – ...
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... FAULT output For high IN+ reliability drives, the open collector FAULT outputs of each HCPL-316J can be wire ‘OR’ed together on a common fault bus, forming a single fault bus for interfacing directly to the micro- controller. When any of the six gate drivers detects a fault, the ...
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... RESET 5 RESET FAULT 6 FAULT 7 V LED1 LED1- Figure 73c. Safe Hardware Reset for Inverting Input Configuration. User-Configuration of the HCPL-316J Output Side R and Optional Resistor The value of the gate resistor R G (along with V and V ) CC2 EE determines the maximum amount of gate-charging/discharging ...
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... When choosing the value important to confirm that the power dissipation of the HCPL-316J is within the maximum allowable power rating. 28 allowing sensing of the IGBT’s saturated collector-to-emitter voltage (when the IGBT CESAT is “on”) and to block high voltages (when the IGBT is “ ...
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... 100 120 140 160 180 200 Figure 76. Typical Peak I and I ON OFF Currents vs. Rg (for HCPL-316J Output Driving an IGBT Rated at 600 V/100 A. SWITCHING ENERGY vs. GATE RESISTANCE ( CC2 EE2 Ess (Qg = 650 nC ...
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... o9,10 P9,10 These equations, however, require that the pin 4 and pins 9,10 temperatures be measured with a thermal couple on the pin at the HCPL-316J package edge. From the earlier power dissipation calculation example 90.8 mW 314 mW 100 C, and assuming the thermal model shown in Figure 77 below ...
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... Ground Plane connections are necessary for pin 4 (GND1) and pins 9 and order to EE achieve maximum power dissipation as the HCPL-316J is designed to dissipate the majority of heat generated through these pins. Actual power dissipation will depend on the application environment (PCB layout, air flow, part placement, etc.) See ...
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... Figure 81. The maximum dead time for the HCPL-316J is 800 ns (= 400 ns - (-400 ns)) over an operating temperature range of - 100 C. Note that the propagation delays used to calculate PDD and dead ...