ISL6327 Intersil Corporation, ISL6327 Datasheet
ISL6327
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ISL6327 Summary of contents
Page 1
... Eliminating ground differences improves regulation and protection accuracy. The threshold- sensitive enable input is available to accurately coordinate the start up of the ISL6327 with any other voltage rail. Dynamic-VID™ technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting ...
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... Pinout VRSEL 2 ISL6327 ISL6327 (48 LD QFN) TOP VIEW VID7 2 VID6 3 VID5 4 VID4 5 VID3 6 VID2 GND 7 VID1 8 VID0 9 10 OFS 11 IOUT 12 DAC PWM3 35 ISEN3+ 34 ISEN3- 33 ISEN1- 32 ISEN1+ 31 PWM1 30 PWM4 29 ISEN4+ 28 ISEN4- ...
Page 3
... ISL6327 Block Diagram VDIFF RGND x1 VSEN OVP +175mV SS OFS OFFSET REF DAC VRSEL VID7 VID6 VID5 VID4 DYNAMIC VID3 VID VID2 D/A VID1 VID0 COMP FB 2V OC2 IOUT IDROOP 3 ISL6327 VR_RDY OVP OVP R S DRIVE Q SOFT-START CLOCK AND AND RAMP FAULT LOGIC ...
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... VID0 VRSEL ISEN2- OVP ISEN2+ IOUT ISEN1- ISEN1+ R IOUT ISEN3- ISEN3+ VR_FAN ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS FS +5V R OFS R T NTC 4 ISL6327 +5V VCC ISL6609 EN DRIVER PWM GND +5V VCC +5V EN REF PWM DAC GND VCC GND +5V VCC PWM6 EN PWM PWM4 GND ...
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... ISEN2+ PWM1 IOUT ISEN1- R IOUT ISEN1+ PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR OFS FS TCOMP +5V +5V R OFS R T NTC 5 ISL6327 +5V VCC EN ISL6609 DRIVER PWM GND +5V VCC +5V EN ISL6609 REF DRIVER PWM DAC GND VCC GND +5V VCC EN ISL6609 DRIVER PWM ...
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... Operating Conditions Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% Ambient Temperature (ISL6327CRZ 0°C to 70°C Ambient Temperature (ISL6327IRZ .-40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
Page 7
... TM Input Voltage for VR_FAN Reset TM Input Voltage for VR_HOT Trip TM Input Voltage for VR_HOT Reset Leakage Current of VR_HOT VR_HOT Low Voltage 7 ISL6327 Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) TEST CONDITIONS Offset resistor connected to ground Voltage below VCC, offset resistor connected to VCC R = 100kΩ ...
Page 8
... During soft-start, VDAC rises from 0 to 1.1V first and then ramp to VID voltage after receiving valid VID input. 6. Soft-start ramp rate is determined by the adjustable soft-start oscillator frequency at the speed of 6.25mV per cycle. 8 ISL6327 Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) TEST CONDITIONS With external pull-up resistor connected to VCC With 1.25kΩ ...
Page 9
... ICs. When EN_PWR is driven above 0.875V, the ISL6327 is active depending on status of EN_VTT, the internal POR, and pending fault states. Driving EN_PWR below 0.745V will clear all fault states and prime the ISL6327 to soft-start when re-enabled. EN_VTT - This pin is another threshold-sensitive enable input for the controller. It’ ...
Page 10
... The voltage at IOUT pin will be proportional to the load current. If the voltage is higher than 2V, ISL6327 will go into the OCP mode, this means it will shut down first and then hiccup. The additional OCP trip level can be adjusted by changing the resistor value. ...
Page 11
... Under the steady state conditions the operation of the ISL6327 PWM modulator appears to be that of a conventional trailing edge modulator. Conventional analysis and design methods can therefore be used for steady state and small signal operation. ...
Page 12
... PWM3, the PWM5 pulse happens 1 cycle after PWM4, and the PWM6 pulse happens 1 cycle after PWM5. The ISL6327 works phase configuration. Connecting the PWM6 to VCC selects 5-phase operation and the pulse times are spaced in 1/5 cycle increments. ...
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... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance the ISL6327 to include the combined tolerances of each of and close T ...
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... TABLE 2. VR10 VID TABLE (WITH 6.25mV EXTENSION) VID4 VID3 VID2 VID1 400mV 200mV 100mV 50mV ISL6327 ISL6327 INTERNAL CIRCUIT + - V COMP ERROR AMPLIFIER I AVG + - DIFFERENTIAL REMOTE-SENSE AMPLIFIER VID0 VID5 VID6 VOLTAGE 25mV 12.5mV 6.25mV ( 1 1.59375 ...
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... ISL6327 (Continued) VID0 VID5 VID6 VOLTAGE 25mV 12.5mV 6.25mV ( 1.325 1.31875 1.3125 1.30625 1 1.29375 ...
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... ISL6327 (Continued) VID0 VID5 VID6 VOLTAGE 25mV 12.5mV 6.25mV ( 0.8625 0.85625 0. 0.84375 0.8375 0.83125 ...
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... ISL6327 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 1.16875 1.16250 1.15625 1.15000 1.14375 1.13750 ...
Page 18
... R = ------------ ----------------- - ISEN Output-Voltage Offset Programming The ISL6327 allows the designer to accurately adjust the offset voltage. When a resistor connected between OFS OFS to VCC, the voltage across it is regulated to 1.6V. This causes a proportional current ( flow into OFS. If OFS R is connected to ground, the voltage across it is OFS regulated to 0 ...
Page 19
... Enable and Disable While in shutdown mode, the PWM outputs are held in a DAC DYNAMIC high-impedance state to assure the drivers remain off. The VID D/A following input conditions must be met before the ISL6327 is R REF released from shutdown mode. REF VCC OR ...
Page 20
... ISL6327 reads the VID code at VID input pins. If the VID code is valid, ISL6327 will regulate the output to the final VID setting. If the VID code is OFF code, ISL6327 will shut down, and cycling VCC, EN_PWR or EN_VTT is needed to restart. ...
Page 21
... OVP threshold is 1.275V. Once the controller detects a valid VID input, the OVP trip point will be changed to the VID voltage plus 175mV. Two actions are taken by the ISL6327 to protect the microprocessor load when an overvoltage condition occurs. At the inception of an overvoltage event, all PWM outputs are commanded low instantly (less than 20ns) ...
Page 22
... TM voltage is lower than 33% of VCC voltage, and is pulled to GND when TM voltage increases to above 39% of Vcc voltage. VR_HOT is set to high when TM voltage goes below 28% of VCC voltage, and is pulled to GND when TM voltage goes back to above 33% of VCC voltage. Figure 14 shows the operation of those signals. 22 ISL6327 VCC R 0.33V TM1 TM R ...
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... Integrated Temperature Compensation When TCOMP voltage is equal or greater than Vcc/15, ISL6327 will utilize the voltage at TM and TCOMP pins to compensate the temperature impact on the sensed current. The block diagram of this function is shown in Figure 15. 23 ...
Page 24
... ISL6327 multiplexes the TCOMP factor N with the TM digital signal to obtain the adjustment gain to compensate the temperature impact on the sensed channel current. The compensated channel current signal is used for droop and overcurrent protection functions. Design Procedure 1. Properly choose the voltage divider for TM pin to match the TM voltage vs ...
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... MOSFET begins conducting, the current in the upper MOSFET falls to zero as the current in the lower MOSFET ramps up to assume the full inductor current. In Equation 26, 25 ISL6327 the required time for this commutation is t approximated associated power loss turn on, the upper MOSFET begins to conduct and this ...
Page 26
... ISEN the current sensing resistor connected to ISEN(n) th ISEN+ pin. and (OPTIONAL COMP FB + IDROOP DROOP - VDIFF FIGURE 17. COMPENSATION CONFIGURATION FOR LOAD-LINE REGULATED ISL6327 CIRCUIT , has already been chosen as FB (EQ. 34) . The target 0 FN9276.1 June 5, 2006 ...
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... IDROOP VDIFF FIGURE 18. COMPENSATION CIRCUIT FOR ISL6327 BASED CONVERTER WITHOUT LOAD-LINE REGULATION The first step is to choose the desired bandwidth, f compensated system. Choose a frequency high enough to assure adequate transient performance but not higher than 1/3 of the switching frequency. The type-III compensator has an extra high-frequency pole, f ...
Page 28
... Input Supply Voltage Selection The VCC input of the ISL6327 can be connected either directly to a +5V supply or through a current limiting resistor to a +12V supply. An integrated 5.8V shunt regulator maintains the voltage on the VCC pin when a +12V supply is used. A 300Ω resistor is suggested for limiting the current into the VCC pin to a worst-case maximum of approximately (EQ ...
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... RMS current calculated. The voltage rating of the capacitors should also be at least 1.25 times greater than the maximum input voltage. 29 ISL6327 Figures 20 and 21 provide the same input RMS current information for three and four phase designs respectively. Use the same approach to selecting the bulk capacitor type and number as described above ...
Page 30
... Locate the output capacitors between the inductors and the load, while keeping them in close proximity to the microprocessor socket. The ISL6327 can be placed off to one side or centered relative to the individual phase switching components. Routing of sense lines and PWM signals will guide final 30 ISL6327 placement ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 31 ISL6327 L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VKKD-2 ISSUE ...